Top Tech Jobs & Startup Jobs

Develop and optimize trace-driven power and thermal simulation engines, integrate IP-level power macromodels into system-level flows, manage time-indexed simulations across power and thermal domains, generate transient power maps and spatiotemporal hotspot analysis, interface with reduced-order thermal models and CFD-calibrated solvers, and ensure simulation performance, scalability, and reproducibility.

Manage customer design-in, qualification, technical enablement, and relationship development for Samsung DRAM products, including DDR, LPDDR, and HBM. Support SI/PI and timing analysis, self-qualification, PCN management, technical reviews, roadmap alignment, and customer debugging. Coordinate with Samsung headquarters and internal business teams to resolve technical and operational issues, influence supplier selection, and drive customer programs to closure. The role requires extensive semiconductor and DRAM experience, customer-facing technical expertise, Korean and English fluency, and occasional domestic and international travel.

Manage customer quality for advanced DRAM products supporting Tier 1 customers. Coordinate failure analysis, 8D responses, change notifications, performance reporting, issue tracking, and technical communications across customers and global engineering teams. Align quality requirements, manage response expectations, escalate issues, and drive sustainable solutions. The role requires semiconductor memory expertise, strong technical communication, customer-facing experience, and daily onsite work in San Jose with 20–30% travel.

Develops, acquires, and grows semiconductor foundry accounts from initial contact through onboarding. Leads account management, customer solutions, marketing pitches, RFQs, design awards, contract negotiations, and sales operations. Partners with Marketing, Finance, Legal, and global headquarters teams while translating semiconductor process capabilities into customer solutions. Requires extensive semiconductor industry experience, a strong executive network, and a proven record closing complex business development and sales deals.

Leads SoC architecture, microarchitecture, top-level integration, RTL implementation, and quality checks through ASIC tape-out. Reviews and integrates commercial IP including ARM, DDR, and UCIe components; collaborates with architects, verification, and physical design teams on synthesis, timing constraints, DFT, and static timing analysis. Supports ATE vector generation, testing, and silicon bring-up while balancing performance, power, and area.

Design and optimize ML compilers for high-performance deep learning applications across varied hardware platforms. Build staged lowering infrastructure, improve data locality and energy efficiency, integrate compiler features with hardware architectures, and collaborate with cross-functional engineering teams. Troubleshoot compiler issues, support customers, document solutions, and research emerging ML compiler and hardware technologies.

Develop black-box functional test coverage and methodologies for NVMe SSDs, debug and triage firmware failures, reproduce issues with firmware teams, design experiments, analyze customer field issues, and improve test coverage. The role requires strong scripting and Linux skills, storage technology expertise, and collaboration across firmware and engineering teams.

Lead product marketing for Samsung DRAM memory products by analyzing markets, customer demand, competitive positioning, market share, pricing, and TAM/SAM. Develop data-supported strategies, influence allocation and production decisions, equip sales teams, create customer presentations, represent Samsung at meetings and industry events, and evangelize DRAM products. The role requires cross-functional collaboration with technical and headquarters teams, including teams in Korea, plus approximately 5% domestic travel.

Develop machine learning and generative AI methods to optimize chip layout for performance, power, and area. Automate physical design, verification, and exploratory PDK generation; build benchmarking, modeling, and QA systems; and evaluate advanced device architectures and process technologies for sub-2nm nodes. Collaborate with global R&D organizations and research consortia, transfer technology to Samsung’s Korea-based development teams, and guide cross-functional technical initiatives.

Leads next-generation DRAM and HBM architecture development, including floorplanning, performance analysis, test planning, DFT methodology, power reduction, power delivery optimization, and full-chip simulation verification. Analyzes silicon electrical data, validates core designs, defines device requirements, and collaborates with customers and cross-functional engineering teams to optimize products for mass production.