Top Tech Jobs & Startup Jobs

Lead verification for AI accelerator IP blocks, developing UVM-based testbenches, automation, simulations, regressions, test plans, and quality metrics. Collaborate with architects, RTL, compiler, and simulation engineers to debug failures and validate functionality and performance across IP, die, SoC, and system levels. Document verification strategies, improve test environments, and mentor junior engineers.

Build a cost-model-guided auto-tuning framework for PyTorch and Triton kernels on a compute-near-memory AI accelerator. Responsibilities include designing search spaces, legality rules, cost models, benchmarking harnesses, tuning caches, and integrations with torch.compile, Inductor, and Triton. The intern will measure LLM inference performance, support data-placement-aware tuning, collaborate with compiler and open-source teams, and deliver tested, documented code and results.

Build AgentSysBench benchmarks and profiling tools for AI agent frameworks and LLM serving workloads. Develop runtime adapters, workload benchmarks, and trace replay systems; profile CPU, memory, GPU, and accelerator performance; measure DDR5, HBM, and CXL bandwidth and latency; evaluate KV-cache sharing and memory expansion; develop memory tiering cost models; and present findings to the team.

Develop, debug, optimize, and validate firmware for enterprise SSD products on complex embedded multi-core architectures. Collaborate with a mentor on firmware upgrade mechanisms, resolve firmware issues, support customer qualification, and contribute to advanced SSD storage research. Participate in scrum meetings and complete assigned development tasks. Gain experience with NVMe, PCIe, OCP, SSD firmware architecture, boot processes, bring-up code, and binary management systems.

Design and optimize ML compilers for high-performance deep learning applications across diverse hardware platforms. Develop staged lowering infrastructure, optimize data locality and compiler execution, integrate ML techniques with hardware architectures, debug compiler issues, support customers, and contribute to documentation. Collaborate with hardware architects, software developers, and cross-functional teams while researching emerging AI/ML computing technologies.

Develops and executes DRAM product marketing strategy by analyzing market demand, pricing, competition, customer trends, and total addressable market. Informs supply allocation and production plans, equips Sales with customer and competitive insights, creates presentations, represents Samsung in customer meetings, and collaborates with technical, sales, and headquarters teams. The role is based onsite in San Jose and focuses on enterprise OEM and datacenter markets.

Develop next-generation DRAM architecture, floor plans, row and column bank circuits, datapaths, test modes, and power delivery optimization. Identify device requirements, analyze silicon electrical data, validate core architecture performance, and collaborate with process integration, device modeling, quality assurance, product engineering, and customers. Document design specifications, performance analyses, and test plans while contributing to Samsung’s memory technology leadership.

Leads architecture, design, and implementation of ML compilers for deep learning applications on next-generation AI hardware. Develops lowering infrastructure, optimization algorithms, memory scheduling, kernel fusion, and code generation. Partners with hardware, runtime, ML framework, and research teams on co-design, troubleshoots complex compiler issues, mentors engineers, and establishes technical standards and documentation.

Design memory unit cell arrays, core layouts, control logic layouts, test structures, and parametric cells for next-generation memory technology. Collaborate on process integration, design architecture, and technology co-optimization. Customize DRCs, support tapeout database integration, document designs, and interact with customers. The role is onsite in San Jose five days weekly with approximately 10% travel.

The Compensation Partner manages market benchmarking, pay competitiveness analysis, job evaluation, and annual compensation processes, including salary reviews, bonuses, incentives, and promotions. The role develops data models, dashboards, governance tools, and executive reports; advises HR and business leaders; supports compensation policy design, communication, and training; and partners on HRIS configuration and testing to ensure effective, scalable compensation workflows.