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Astera Labs

Principal Design Verification Engineer - CXL/PCIe

18 Days Ago

Bengaluru, Karnataka, IND

148 Employees

Expert/Leader

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148 Employees

Expert/Leader

Big Data • Information Technology

The Principal Design Verification Engineer will develop and execute verification plans for CXL and PCIe designs, write and execute test sequences, and collaborate with RTL designers to debug issues. Responsibilities also include creating VIP abstraction layers and analyzing coverage data.

Astera Labs

Principal Firmware Engineer

19 Days Ago

Toronto, ON, CAN

148 Employees

160K-224K Annually

Expert/Leader

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148 Employees

160K-224K Annually

Expert/Leader

Big Data • Information Technology

Architect and develop firmware and microcontroller subsystems for SoC and systems products. Responsible for implementing major features. Must work closely with hardware and customers. Strong academic background in electrical engineering required.

Astera Labs

Principal Product Applications Engineer-PCIe/CXL

21 Days Ago

Vancouver, BC, CAN

148 Employees

160K-240K Annually

Expert/Leader

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148 Employees

160K-240K Annually

Expert/Leader

Big Data • Information Technology

Provide technical guidance to customers, generate collateral for products, drive innovation, support semiconductor products design, and address challenges in leading-edge technology.

Astera Labs

Firmware Engineer - DDR

24 Days Ago

Vancouver, BC, CAN

148 Employees

Senior level

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148 Employees

Senior level

Big Data • Information Technology

The Firmware Engineer will design and develop firmware for DDR and CXL/PCIe technologies at Astera Labs, focusing on customer needs and collaborating with teams to implement essential features. Responsibilities include creating unit tests, optimizing memory systems, and ensuring compliance with DDR standards.