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The Principal Emulation Engineer will verify protocols on ASICs, create testing environments, and debug hardware-software interfaces, focusing on communication protocols like PCIe and Ethernet.

The Principal Physical Design Engineer will design complex SoC/silicon products, ensuring timing closure and verification, and manage full-chip ownership from architecture to production using various backend tools and methodologies.

Architect and develop firmware for SoC and systems products, ensuring customer needs are met and managing dynamic tasks efficiently.

Lead complex physical design projects for advanced semiconductor products, ensuring timing closure and full-chip design ownership, from architecture to GDSII.

The Principal Solutions Marketing Manager drives the go-to-market strategy and solution positioning for Astera Labs' connectivity platforms in AI and cloud markets, focusing on partner programs and marketing content.

As a Senior Platform Engineer, you will build and support platforms for AI infrastructure, develop automation tools, and collaborate with customers to solve technical challenges.

Astera Labs seeks talented professionals in various disciplines for future openings, focusing on hardware, firmware, software, program management, and operations.

Seeking a Sr. Principal Technologist to drive architecture for AI software solutions, influencing products and managing customer engagements in hyperscale data centers.

The Senior Firmware Verification Engineer will verify firmware for SoC products, develop test plans, review code, and ensure quality through testing methodologies.

Seeking a Lead Software QA Engineer to design and execute functional, performance, and interoperability tests for PCIe switch technology, collaborating with multiple teams and mentoring others.