Top Tech Jobs & Startup Jobs

Lead end-to-end program planning and execution for AMS IP development from specification through tape-out and silicon bring-up. Orchestrate cross-functional teams (circuit design, layout, verification, validation), manage schedules, risks, budgets, and vendor/foundry coordination, and drive process improvements and stakeholder alignment to deliver high-quality silicon on schedule.

Lead advanced packaging R&D for photonics products, defining process flows (wafer/panel/die), integrating EIC-to-PIC, qualifying materials and equipment, partnering with OSATs and vendors, and driving yield, reliability, PDKs, and packaging design rules for NPO/CPO products.

Lead formal verification for complex IP and SoC designs: create formal plans, develop assertions and properties, drive proof convergence, deploy verification flows and tools, mentor engineers, triage bugs, and support verification sign-off to ensure first-pass silicon success.

Lead DFT strategy and execution for multi-die PCIe switch products using 2.5D/3D packaging. Define test architecture, implement scan/ATPG/MBIST/LBIST, drive fault coverage targets, optimize production test and ATE costs, collaborate across design, packaging, validation, and manufacturing to ensure yield, reliability, and production ramp.

The Senior Principal Engineering Program Manager will lead ASIC product development, ensuring timely execution, risk management, and cross-functional alignment across various teams to deliver revenue-critical silicon solutions.

The Senior Principal Technologist will drive the architecture and development of data center memory solutions, engage with customers, and influence product features using expertise in system and memory architecture and technologies.

Lead architecture and RTL development for high-speed Ethernet and AI scale-up connectivity ASICs. Define microarchitecture, packet processing, DMA/RDMA acceleration, QoS, congestion management, and hardware/software interfaces. Drive designs from architecture through RTL, verification, tapeout, and post-silicon bring-up while mentoring senior engineers and aligning cross-functional teams to performance, power, and manufacturability targets.

Senior technical leader defining ASIC architecture and driving RTL design, verification, tapeout, and post-silicon bring-up for high-performance Ethernet and AI connectivity products. Lead microarchitecture for MACs, NIC datapaths, packet processing, DMA, RDMA/transport acceleration, congestion control, virtualization, and hardware/software interfaces while mentoring teams and meeting performance, power, area, and reliability targets.

The Senior Product Engineer will lead high-speed semiconductor product development, overseeing validation, testing, and ATE programming, while ensuring quality delivery to customers.

Lead product management for Smart Cable Modules, defining product strategy, engaging customers, and ensuring products meet AI infrastructure needs.