Top Tech Jobs & Startup Jobs

Lead design and delivery of connectivity soft IP for Lattice FPGAs: translate specs into high-speed RTL optimized for performance, power, and area; implement/verify SERDES, video and peripheral protocols; perform CDC/lint, timing closure, hardware validation and interoperability tests; develop packaging, example designs and testbenches; provide technical leadership.

Develop and execute comprehensive SoC verification plans and metrics. Build SystemVerilog and C UVM testbenches, UVCs, BFMs and verification tools. Run assertion/formal, directed and randomized tests; perform functional, RTL, assertion and gate-level coverage. Collaborate with design, IP and SW teams to deliver high-quality verification and drive best practices.

Senior tax and accounting role supporting Greater China. Owns CIT provisioning and filings, monthly VAT and fapiao management via Golden Tax, ASC 740 tax provisioning for China/HK/TW, PRC GAAP to US GAAP reconciliations, month-end close and tax journal entries, and liaison with tax authorities and external auditors. Supports HK and Taiwan tax compliance and cross-border withholding/treaty matters.

Lead delivery of FPGA-based server connectivity solutions by developing and maintaining FPGA reference designs, performing RTL development (Verilog/VHDL), and supporting customer integration. Deliver demonstrations, provide technical support, create documentation, troubleshoot design and integration issues, and collaborate with FAE, R&D, marketing, and sales.

Lead development and execution of SoC verification plans. Create SystemVerilog and C UVM testbenches, verification components, and regressions. Perform assertion, functional, RTL and gate-level coverage and formal verification. Use Cadence/Xcelium, VCS or Questa and scripting (Python/Perl/TCL) to debug and automate. Collaborate with design, IP and software teams to deliver high-quality silicon on aggressive schedules.

Lead QA/test for FPGA backend tools: create and run automated regression suites, analyze and drive fixes, prepare/excute test plans, debug in simulation and hardware, and automate testing using AI tools across distributed teams.

Lead go-to-market strategy for humanoid robots, cobots, and adjacent AMRs. Define segment strategy, solution narratives, MRDs, and differentiations around low-power programmable logic and Tiny AI. Drive design-win engagement with top platform architects, build targeted ecosystem partnerships, coordinate with sales and engineering, and represent the company at industry forums to accelerate adoption of Physical AI at the edge.

Manage assigned accounts and territories to drive revenue and design wins. Build account plans, maintain CRM pipeline, forecast sales, influence stakeholders, coordinate cross-functional teams, and present technical value propositions. Advocate customer needs to product teams and negotiate contracts to achieve measurable customer satisfaction and business goals.

Lead modernization of legacy UI codebases (C++/Qt), define UX and UI architecture for EDA tools, mentor engineers, champion accessibility and visual design, run user research and usability testing, and ensure performance, scalability, and maintainability of UI systems.

Design, integrate, validate and deploy FPGA-based system solutions across verticals (Vision/AI, server security, industrial automation, communications, automotive). Work with customers and internal FPGA, SW/FW and data science teams to define requirements, tune performance, plan and execute validation, analyze test results, and resolve system-level issues.