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The Principal Edge AI Firmware Engineer will develop and optimize embedded software for AI applications, focusing on performance and energy efficiency. Responsibilities include enhancing AI runtimes, profiling tools, and ensuring customer integration across embedded environments.

Lead development and optimization of ATE test solutions for IC characterization, qualification, and production. Develop test programs and hardware, analyze yield and test data, debug failures, support production ramps, and collaborate with cross-functional teams and external OSAT partners to improve yield, reduce test cost, and ensure product quality.

Develop and support Ambiq's Trusted Execution Environment and related security implementations for embedded systems, ensuring compliance with security standards and seamless integration with customer builds.

Design, implement, and debug Bluetooth radio firmware for the Apollo Blue family. Develop features, optimize performance and power, write tests, support FAEs, triage validation issues, produce technical documentation, and collaborate cross-functionally to integrate wireless components.

Lead the development and testing of Ambiq's Zephyr software, including driver and software testcase development, maintaining compliance, and solving issues in collaboration with global teams.

The Sr Director of System Architecture leads the development of ultra-low-power, AI-based SoC architectures and coordinates teams to drive specifications, power/performance analysis, and integration into products.

Maintain and improve production test lines: troubleshoot and transfer tester platforms (D10/DX to S100), manage production tooling vendors, support OSAT yield improvement with foundry PE/TE, analyze RMA and production data, and coordinate shipping targets with planning and quality teams.

Lead post-silicon validation for MCU/SoC products from first-silicon through production: develop and run validation plans, automate regression tests, perform electrical characterization and PVT/shmoo testing, debug hardware/firmware issues, support board bring-up and lab testing, analyze failures and production issues, and collaborate across design, firmware, ATE, and product teams to improve product quality and manufacturing readiness.

The Principal Engineer - RTL will oversee pre-tape out quality for digital SoC modules, lead architecture and micro-architecture development, and manage RTL development. Responsibilities include IP integration, collaboration with verification teams, and assisting in silicon validation.

Design and implement low-power DFT architecture for ultra-low-power SoCs: scan insertion, boundary scan, MBIST and ATPG; generate and optimize structural test vectors; run pre/post-layout simulations; collaborate with designers and test engineers to resolve timing, power, and logical issues and bring up tests on silicon.