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The Sr. Staff Embedded Software Engineer will lead MCU software development, focusing on Secure Boot and hardware integration, while ensuring high security standards in products.

Develop and support Ambiq's Trusted Execution Environment and related security implementations for embedded systems, ensuring compliance with security standards and seamless integration with customer builds.

The Principal Edge AI Firmware Engineer will develop and optimize embedded software for AI applications, focusing on performance and energy efficiency. Responsibilities include enhancing AI runtimes, profiling tools, and ensuring customer integration across embedded environments.

Lead development and optimization of ATE test solutions for IC characterization, qualification, and production. Develop test programs and hardware, analyze yield and test data, debug failures, support production ramps, and collaborate with cross-functional teams and external OSAT partners to improve yield, reduce test cost, and ensure product quality.

Design, implement, and debug Bluetooth radio firmware for the Apollo Blue family. Develop features, optimize performance and power, write tests, support FAEs, triage validation issues, produce technical documentation, and collaborate cross-functionally to integrate wireless components.

Provide technical support to Austin office employees by troubleshooting hardware, software, and network issues while maintaining IT infrastructure and documentation.

The Senior Embedded Software Engineer will develop, integrate, and verify SDKs for SoC platforms, lead HAL and driver development, and validate embedded systems through collaboration across teams.

Develop, implement, and debug FPGA images for pre-silicon prototyping using Xilinx and Intel toolchains. Collaborate with SoC design, software, verification, and test teams to define timing constraints, support regression test suites, reproduce and triage issues pre- and post-silicon, and perform lab bring-up and instrument-based debugging.

Lead end-to-end digital verification for complex SoCs, developing UVM/SystemVerilog testbenches, SoC-level C/C++ tests, automation, coverage goals, debugging, and collaborate with design teams to ensure production-ready silicon.

The Principal Engineer - RTL will oversee pre-tape out quality for digital SoC modules, lead architecture and micro-architecture development, and manage RTL development. Responsibilities include IP integration, collaboration with verification teams, and assisting in silicon validation.