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Lead customer-facing development of digital reference flows for ASIC implementation (synthesis through sign-off). Create baseline flows, run implementation testcases for process certification and Tempus/Voltus sign-off, document flow steps, and optimize PPA.

Lead customer-facing technical efforts to drive adoption of the Virtuoso platform for custom analog and FinFET layouts. Build SKILL utilities, create test schematics/layouts, author PRSs, validate features with PV, deliver demos/RAKs, train sales/pre-sales, and collect structured customer feedback to guide R&D and product improvements.

The role involves developing verification plans for SOCs, executing verification methodologies, addressing debug issues, and collaborating with engineering teams.

Searching for a VLSI Design Verification Engineer with 3-5 years of experience to develop and execute verification plans for SOC projects, ensuring testability and design intent.

Implement high-speed digital DDR PHY IP physical design. Develop scripts/tools to improve PD flows, resolve design issues, optimize PPA, and apply optimal parameters and methodologies across projects (floorplan, CTS, STA, verification, power).

Design and build scalable EDA flows and AI/LLM-driven automation for 3DIC, interposer, and RDL systems. Implement flow-generation, debugging assistants, root-cause analysis, and platform integration using C++, Tcl, Python, and Java. Collaborate with engineering teams to validate flows, automate constraint-driven designs, and address large-scale, high bump-count and multi-region routing challenges to deliver production-quality solutions.

Develop firmware for high-speed SERDES PHY across architecture, implementation, verification, post-silicon validation and customer deployment. Debug with verification teams, support validation and product engineering, implement control/prototype software and firmware tests, and improve firmware for performance and robustness.

The Lead Software Engineer will enhance Orion's capabilities by optimizing high-performance compute and storage systems, developing complex distributed systems, and collaborating with various teams.

Lead and manage EU and European government-funded contract opportunities, coordinating sales, legal, and technical teams through RFQ/RFP, proposal development, negotiation, risk assessment, and contract execution while ensuring compliance and stakeholder engagement.

The Principal Design Engineer will perform functional verification of the DDR Subsystem, ensuring high quality and adherence to technical requirements, while mentoring team members and improving verification processes.