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The Product Engineer II will develop and manage PEGASUS/PVS tools while collaborating with customers and R&D to enhance product quality and requirements.

The Principal Design Engineer leads the Functional Safety Design Verification Team, developing and verifying safety mechanisms in hardware and software for Xtensa processors, while ensuring compliance with safety standards.

The role involves IP integration, verification, and release, focusing on RTL integration and debugging, with significant required experience in design processes.

Internship role focusing on RF design analysis, software development processes, design algorithms, software debugging, and GUI development.

Join the Cadence Protium team to optimize compiler TDM route development, focusing on compile time, performance, and memory efficiency.

The role involves building and validating virtual/hybrid prototypes, optimizing system models, and helping customers with software validation. You will interact with engineering teams and provide feedback to improve technological tools.

Develop firmware for DDR5 PHY using microcontrollers, collaborate with hardware designers, and debug firmware-hardware interactions on silicon bring-up boards.

Develop, maintain, and debug software for low power design and verification in custom mixed-signal designs using C++ and Tcl on Linux. Collaborate with team, create functional specifications, and perform testing.

Drive RTL-to-GDSII metrics for complex designs, partner with sales on account strategy, evangelize new technologies, and mentor junior team members.

The intern will work with the Verification Management product group to develop ML capabilities for classifying digital design code changes to identify potential bugs.