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Responsible for developing Pegasus, a parallel verification product, and contributing to case analysis, bug fixes, and feature development.

Lead physical design initiatives for complex IPs and SoCs (<7nm): perform physical design, timing closure, and physical verification within ASIC flows; use Cadence tools (Genus, Innovus, Quantus, Tempus, PVS, Voltus); address EM/IR and formal verification; develop automation via Makefile/Tcl/Tk/Perl/Python; collaborate across teams and communicate results.

Lead verification strategy and testbench architecture for ASIC/SoC projects using UVM/SystemVerilog. Develop reusable BFMs, tests, and constrained-random stimuli; apply coverage-driven and formal verification; perform GLS and timing verification; debug complex RTL issues; mentor junior engineers; manage verification metrics and sign-off; interact with customers to translate requirements into DV plans.

Drive frontend digital design architecture for products, mentor team, and ensure high-quality design implementation across cross-functional teams.

Responsible for designing and supporting IP models of AMBA and CUP protocols, collaborating with customers and internal teams to enhance product quality.

Design, develop, and support enterprise integrations using Dell Boomi, focusing on API-led integration and database development, while providing production support and governance.

The Product Engineer will develop solutions for customers, improve technology performance and collaborate with the R&D team to resolve issues.

The Account Executive will be responsible for driving sales and building relationships to meet company goals in technology sectors.

Lead the development of a scalable AI platform by utilizing LLM/ML, deploying containers, and creating efficient architectures.

The role involves developing AI-enhanced methodologies for pre-silicon functional verification, engaging with customers, and collaborating with engineering teams.