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Cadence Design Systems

Principal C++ Software Engineer

Yesterday

Mount Royal, QC, CAN

8,216 Employees

Senior level

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8,216 Employees

Senior level

Cloud • Hardware • Software • Semiconductor

Design and develop new features and algorithms for a Custom Prototyping Flow in a fast-paced startup environment. Collaborate with a distributed team and resolve implementation or usage issues with key customers. Work on breakthrough solutions in multi-FPGA prototyping space.

Cadence Design Systems

Principal Design Verification Engineer

Yesterday

Bangalore, Bengaluru Urban, Karnataka, IND

8,216 Employees

Senior level

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8,216 Employees

Senior level

Cloud • Hardware • Software • Semiconductor

Seeking a Principal Design Verification Engineer with 8+ years of experience in Design Verification using SystemVerilog and UVM. Must have a strong background in functional verification fundamentals and experience verifying complex designs.

Cadence Design Systems

IT Sr Staff Storage Engineer

Yesterday

Bangalore, Bengaluru Urban, Karnataka, IND

8,216 Employees

Senior level

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8,216 Employees

Senior level

Cloud • Hardware • Software • Semiconductor

Ensure availability, reliability, scalability, and manageability of data storage environment. Collaborate with stakeholders to meet data and storage requirements. Monitor and analyze system performance to optimize Storage environments. Provide technical expertise, support, and recommendations for storage infrastructure improvement. Manage capacity and performance of storage infrastructure. Assist with backup and recovery procedures. Participate in change control activities.

Cadence Design Systems

Design Engineer II

Yesterday

Bangalore, Bengaluru Urban, Karnataka, IND

8,216 Employees

Mid level

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8,216 Employees

Mid level

Cloud • Hardware • Software • Semiconductor

Design Engineer II at Cadence with 2-4 years (with Btech) or 1-2 years (with Mtech) of experience in Post-Silicon Physical Layer Electrical Validation. Responsibilities include deep physical layer electrical validation on high-speed SERDES protocols, using lab equipment, managing small teams, leading post-silicon validation efforts, FPGA design, PCB schematic and layout design, and more.

Cadence Design Systems

Sr. Principal Design Engineer

Yesterday

Austin, TX, USA

8,216 Employees

Senior level

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8,216 Employees

Senior level

Cloud • Hardware • Software • Semiconductor

Lead the verification effort for Cadence's Memory Controller IP, contribute to functional verification, add new features to verification environment, ensure clean customer configurations, provide support to customers, and ensure design meets technical and quality requirements.

Cadence Design Systems

Lead Design Engineer

Yesterday

Bangalore, Bengaluru Urban, Karnataka, IND

8,216 Employees

Junior

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8,216 Employees

Junior

Cloud • Hardware • Software • Semiconductor

Design Engineer I with 1+ years of experience in analog/mixed-signal layout design of deep sub-micron CMOS circuits. Responsibilities include custom and standard cell based floor-planning, achieving tight matching, low noise, and low power consumption in layouts, managing various layout parameters, collaborating with circuit designers, and interpreting reports. Knowledge of CADENCE layout tools and scripting skills in PERL or SKILL are a plus.

Cadence Design Systems

Principal Design Engineer

Yesterday

Pune, Mahārāshtra, IND

8,216 Employees

196K-364K Annually

Senior level

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8,216 Employees

196K-364K Annually

Senior level

Cloud • Hardware • Software • Semiconductor

Participate in the design and development of a fully configurable and fully featured Network on Chip (NoC) product. Responsibilities include hardware architecture, micro-architecture definition, and RTL design for high performance and low power. Familiarity with NoC technology, AMBA protocols, and coherency protocols required.

Cadence Design Systems

Application Engineer in PCB Design

2 Days Ago

Vélizy-Villacoublay, Yvelines, Île-de-France, FRA

8,216 Employees

Junior

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8,216 Employees

Junior

Cloud • Hardware • Software • Semiconductor

As a Junior Application Engineer for PCB Design, you will support technical campaigns for Cadence PCB Solutions through presentations, product demonstrations, and offerings of training. Your role includes providing technical solutions to customers, working with the sales team, delivering technical support, and participating in team projects.

Cadence Design Systems

Principal Emulation and Prototyping IC Application Engineer

2 Days Ago

San Jose, CA, USA

8,216 Employees

120K-224K Annually

Entry level

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8,216 Employees

120K-224K Annually

Entry level

Cloud • Hardware • Software • Semiconductor

The Emulation and Prototyping Application Engineer at Cadence provides technical expertise and support to customers, collaborates with R&D, champions customer needs, develops competitive solutions, and leads technical efforts in small teams.

Cadence Design Systems

Technical Communications Engineer II

2 Days Ago

Noida, Gautam Buddha Nagar, Uttar Pradesh, IND

8,216 Employees

Mid level

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8,216 Employees

Mid level

Cloud • Hardware • Software • Semiconductor

The Technical Communications Engineer II will create usable technical documentation for Cadence's EDA products by collaborating with cross-functional teams and utilizing technical communication tools. Responsibilities include understanding EDA principles, developing structured content, and producing supporting materials such as videos and blogs.