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Perform Quality Assurance activities including defining QA strategy, supporting project teams, tracking performance objectives, coordinating QA activities, conducting internal audits, generating reports, implementing processes, and mentoring project teams. Some travel required (0%-25%).
Design high-speed CMOS analog and mixed-signal integrated circuits for PAM4 SERDES applications. Own circuit and system specifications, support Mixed-Signal IP through post-tapeout phase. Requires a Master's Degree or PhD and 10+ years of industry experience in mixed-signal, high-speed CMOS circuit design.
As a Staff Design Engineer in the MPU32 group at Microchip Technology, you will be responsible for design and integration of complex IPs and subsystems into SoCs. This role includes RTL design, design verification, synthesis, and mentoring junior team members. Join a globally recognized organization with a focus on innovation and growth opportunities!
Join Microchip Technology, Inc. as a Staff Applications Engineer working on microprocessor-based products for tablets, desktops, notebooks, and embedded systems in Hauppauge, New York. Responsibilities include firmware development, customer support, and assisting in sales and marketing efforts.
Principal Engineer - Hardware position at Microchip Technology, Inc. in Boulder, CO. Responsible for leading and contributing to hardware designs for R&D programs. Requires creating, analyzing, and improving electronic designs, collaborating with cross-functional teams, conducting design reviews, writing product requirements, and mentoring junior engineers.
Join Microchip Technology, Inc. as a Tech Staff Engineer - Design (ASIC) in the Data Center Solutions group. Develop storage controller SOC products from initial concept to production form. Collaborate with experienced engineers and contribute to industry-leading technology. Embrace an environment of innovation, learning, and continuous growth.
Join Microchip Technology, Inc. as a Principal IO Design Engineer in the Data Center Solutions business unit. Design the next generation of storage and memory controller SoC products, working alongside experienced engineers and contributing to industry-leading technology. Develop pad rings, package substrates, and bump patterns, optimize pad ring connectivity, and collaborate with cross-functional teams for deliverables and support.
The Income Tax Manager will oversee the global income tax provision process and income tax compliance for a multi-national semiconductor company. Responsibilities include tax provision, income tax compliance, managing team members, and supporting tax audits and projects.
Responsible for design and development of embedded flash macros using SST Superflash technologies, block analog circuit design, logic design, full-chip simulation, EMIR verification, and parasitic extraction. Support testing and silicon validation. Require 2+ years of analog/memory design experience, BS or MS in Electrical Engineering, and fluency in Vietnamese and English.
Candidate must have 2 to 5 years of experience working in VLSI design with strong digital design skills and experience in Verilog/SystemVerilog. Familiarity with FPGA, Ethernet, PCIe, and scripting is preferable.
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