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Develop and maintain technical documentation for FPGA and SoC products, including user guides, reference manuals, application notes, workflows, diagrams, and illustrations. Collaborate with engineering and product teams to explain RTL design, simulation, synthesis, timing analysis, protocols, and hardware validation. Manage documentation deliverables, apply DITA and style-guide standards, use authoring and collaboration tools, meet aggressive deadlines, and improve technical publications processes.

Own verification for complex blocks and subsystems within ARM-based SoCs. Develop SystemVerilog and UVM test environments, create test plans and constrained-random tests, manage regressions, analyze code and functional coverage, debug RTL and testbench issues, and collaborate with architects and validation teams. The role also contributes to automation initiatives, methodology improvements, cross-site program leadership, and mentorship of junior engineers.

Supports business application analysis, requirements gathering, process mapping, automation opportunities, documentation, testing, and user acceptance. The analyst translates business needs into functional specifications, user stories, process flows, data models, test cases, and acceptance criteria. Responsibilities also include SQL-based data validation and troubleshooting, application support, issue tracking, stakeholder communication, and collaboration with developers and QA teams.

Design, develop, and optimize embedded Linux platform software including U-Boot, kernel porting, and custom Ethernet/peripheral drivers. Perform ARM board bring-up, debug complex issues, collaborate cross-functionally, and produce design documentation for network timing and synchronization products.

Lead architecture, RTL design, and verification of multi-gigabit Ethernet PHY digital blocks using industry-standard ASIC flows. Perform RTL coding, functional verification, pre-silicon FPGA emulation, synthesis/STA, and coordinate silicon bring-up while mentoring junior engineers and collaborating with cross-functional global teams.

Lead chip-level design and verification for Touch Controller IPs, from specification and architecture through RTL implementation and verification. Contribute to design reviews, documentation, development methodology, project coordination, and cross-functional collaboration.

Provide technical support and training for USB products, debug customer hardware/software implementations, develop evaluation hardware and reference designs, create documentation and application collateral, and collaborate with product marketing and partners to guide product development.

Designs, integrates, validates, and debugs FPGA-based platforms supporting USB and Ethernet PHY products, mixed-signal IP, and SoC solutions. Responsibilities include RTL coding, simulation, synthesis, timing analysis, place-and-route, multi-clock-domain design, performance optimization, board-level bring-up, laboratory debugging, system integration, documentation, and automation of FPGA development flows. The engineer collaborates with digital, analog, hardware, firmware, software, ASIC, verification, and validation teams.

Supports product application engineering for mixed-signal ICs through customer design-in assistance, schematic and layout reviews, board debugging, bench characterization, and development of datasheets, reference designs, application notes, evaluation boards, and design tools. Collaborates with marketing, product management, chip design teams, customers, and internal stakeholders to gather requirements and support new product launches.

The Quality Manager leads QA teams, manages quality systems, ensures certifications, coordinates customer feedback, and promotes continuous improvement while overseeing quality processes and compliance.