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Responsible for designing and delivering hybrid cloud solutions, working on implementation, compliance, and customer engagement for enterprise clients across Southeast Asia.

Design, develop, and maintain features for the Junos Evolved network OS. Implement and debug Linux device drivers and system bring-up for Platform/Interfaces/Optics. Troubleshoot platform, interface, and optics issues, collaborate with hardware, QA and cross-functional teams, lead code reviews, architecture discussions, and documentation to deliver resilient, high-performance networking solutions.

Design, develop, and test software systems and subsystems; write and execute test plans; debug and resolve integration issues; lead and mentor engineering teams; collaborate with internal and outsourced partners on design, progress, and issue resolution.

Design, develop, and deploy advanced machine learning and deep learning models; lead research, architecture, and productionization of AI solutions; mentor teams; monitor and optimize model performance; collaborate with cross-functional stakeholders to align AI/ML systems with business requirements.

The Product Manager will oversee the portfolio of power and cooling solutions for HPC & AI, from product definition to market launch, collaborating across engineering and operations while conducting market analysis and developing product strategies.

Manage multiple concurrent hardware engineering projects: define and track milestones, anticipate risks, drive cross-functional alignment, deliver data-driven stakeholder updates, and identify process improvements to ensure timely, quality outcomes.

Lead a team of 4–6 hardware sustaining engineers to manage failure analysis and design-change projects. Drive RCCA and hardware quality reporting, resolve customer escalations, collaborate with supply chain, manufacturing, CM/ODM and component engineering, and implement proactive quality improvements for NPI. Track team performance via one-on-ones and OKRs and communicate findings to executives and customers.

As a Senior ASIC Design Verification Engineer, you will validate ASIC features using UVM, develop verification environments, and collaborate with teams for debugging and validation.

Manage the contracting process for sales, negotiate contracts, analyze legal risks, and provide guidance to business leaders. Oversee compliance and post-execution modifications, working collaboratively across teams.

Design and architect high-performance VLSI/ASIC blocks for networking ASICs. Perform micro-architecture and Verilog RTL design, collaborate on verification and physical design, debug timing and functional issues, and optimize for throughput and power.