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4 Days AgoSaved
In-Office
Irvine, CA, USA
127K-203K Annually
Senior level
127K-203K Annually
Senior level
Semiconductor
Responsible for designing analog blocks and systems, optimizing circuit architectures, debugging performance issues, and collaborating with teams to define circuit parameters and test boards.
Top Skills: Analog DesignAte SupportCadence Design ToolsMatlabMixed Signal DesignRf Design
4 Days AgoSaved
In-Office
Plano, TX, USA
174K-279K Annually
Senior level
174K-279K Annually
Senior level
Semiconductor
The Account Director will drive revenue for Enterprise customers by managing sales opportunities, maintaining relationships, and achieving revenue goals.
Top Skills: B2B Software SolutionsVMware
5 Days AgoSaved
In-Office
Plano, TX, USA
174K-279K Annually
Expert/Leader
174K-279K Annually
Expert/Leader
Semiconductor
As an Account Director, you will manage revenue growth for existing Enterprise customers, ensure sales objectives are met, and maintain relationships with decision makers.
Top Skills: B2B Software SolutionsVMware
5 Days AgoSaved
In-Office
Colorado Springs, CO, USA
127K-203K Annually
Expert/Leader
127K-203K Annually
Expert/Leader
Semiconductor
The Physical IC Design Engineer will execute physical design tasks from RTL to silicon tape-out, including synthesis, verification, and timing closure in a collaborative environment.
Top Skills: Eda ToolsPerlTcl
5 Days AgoSaved
In-Office
Colorado Springs, CO, USA
108K-173K Annually
Senior level
108K-173K Annually
Senior level
Semiconductor
The DFT IC Design Engineer will execute DFT implementation, verification, and debug, collaborating with RTL and Physical Design Engineers, focusing on AI/ML ecosystems for PCIe Switch Products.
Top Skills: AteAtpgBisrBistDftMbistNetlistRtlScanSiemens Tessent Tool
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5 Days AgoSaved
In-Office
Colorado Springs, CO, USA
127K-203K Annually
Expert/Leader
127K-203K Annually
Expert/Leader
Semiconductor
The DFT IC Design Engineer will execute DFT implementation, verification, and collaborate with IC and Physical Design Engineers, requiring extensive experience in design flows and methodologies.
Top Skills: NetlistsRtlSiemens Tessent Tool
5 Days AgoSaved
In-Office
Colorado Springs, CO, USA
108K-173K Annually
Senior level
108K-173K Annually
Senior level
Semiconductor
The RTL IC Design Engineer will develop high-performance RTL designs, manage micro-architecture specifications, and collaborate with cross-functional teams to drive timing closure and validation of designs for AI/ML ecosystems.
Top Skills: Verilog,Systemverilog
5 Days AgoSaved
In-Office
Colorado Springs, CO, USA
108K-173K Annually
Senior level
108K-173K Annually
Senior level
Semiconductor
The Physical IC Design Engineer will execute Physical Design tasks, manage RTL to silicon tape-out processes, and collaborate with IC Design engineers, requiring strong scripting and EDA tool expertise.
Top Skills: Eda ToolsPerlTcl
5 Days AgoSaved
In-Office
Colorado Springs, CO, USA
127K-203K Annually
Expert/Leader
127K-203K Annually
Expert/Leader
Semiconductor
The role involves executing Physical Design from RTL to silicon tape-out, including synthesis, verification, and timing closure for PCIe Switch Products.
Top Skills: Eda ToolsPerlTcl
5 Days AgoSaved
In-Office
2 Locations
73K-117K Annually
Senior level
73K-117K Annually
Senior level
Semiconductor
The Sr. Technical Consultant provides expertise in workload automation, analyzes requirements, evaluates solutions, and recommends enhancements. Responsibilities include troubleshooting and offering guidance on technical aspects of automation.
Top Skills: ScriptingWorkload Automation
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