Top Tech Jobs & Startup Jobs

Design and develop integrated circuits and ASICs, owning architecture, logic design, verification, and system simulation. Drive synthesis, place-and-route, timing and power analysis, and complex IC layout. Evaluate process flows and equipment, run experiments, review vendor capability, lead major projects, mentor junior engineers, and deliver new products/processes.

Design and develop integrated circuits and oversee ASIC development from architecture and logic design through system simulation, synthesis, place-and-route, timing and power analysis. Define module interfaces and layouts, evaluate process flow and equipment, run experiments, assess vendor capabilities, lead major projects, mentor junior engineers, and drive delivery of new products and processes.

Act as the Product Owner for AI-powered mainframe application understanding and impact analysis: maintain and prioritize backlog, refine stories, coordinate cross-functional teams, engage customers for feedback, and represent the customer voice to R&D and leadership to maximize product value.

Lead and execute backend digital physical design for SoC at 5nm and below, including floorplanning, placement, CTS, routing, extraction, physical verification, STA closure, ECO implementation, and automation of EDA flows while collaborating across teams to improve turnaround time and quality.

Lead design and development of complex integrated circuits and ASICs, defining architecture, logic, simulation, synthesis, place-and-route, timing and power analysis. Oversee verification, documentation, experimental evaluation, vendor capability reviews, and mentor junior engineers while managing major projects from concept through delivery.

Design and execute verification plans for IP blocks and systems using SystemVerilog/UVM. Build testbenches, develop Python behavioral models, analyze simulations, debug failures, maintain automation/regression frameworks, and collaborate with design and architecture teams to improve verification methodologies and resolve root causes.

Perform SOC physical design: floorplanning, partitioning, placement, CTS, routing, and physical verification (LVS/DRC/ERC/Antenna). Execute STA, equivalence checks, crosstalk and noise analysis, power optimization, timing/functional ECOs, and formal verification. Drive congestion resolution and timing closure, work independently and mentor team members in a global environment.

Lead constrained-random verification of high-throughput Ethernet ASICs for AI/ML acceleration using SystemVerilog/UVM testbenches, drive coverage closure, run simulations with VCS/Incisive, script automation, collaborate with global design and architecture teams, and provide technical leadership.

Lead quality engineering for enterprise security products: define test strategy, drive automation (UI/API), integrate tests into CI/CD, validate system integrations, implement AI-driven test/data generation and quality insights, manage release hardening, and partner with product and development teams to ensure production readiness.

Develop and implement complex ASIC verification environments and test plans for high-performance network switch ASICs/FPGAs. Collaborate with architects and design teams, perform simulations, and drive verification to closure through tape-out and production-ready delivery.