Top Tech Jobs & Startup Jobs

Develop and validate test programs for wafer sort, unit class, burn-in and parametric testing. Define test plans, debug results, coordinate with design, yield, foundry, and test operations, and improve tester/tool performance.

Directs and manages design verification engineers for Subsystem and SoC design, enhances verification processes, and ensures security compliance while leading team performance.

Design and implement DFT features (SCAN, MBIST, BSCAN) via RTL (Verilog/VHDL/SystemVerilog); provide timing closure and test content for manufacturing; collaborate across architecture, design, verification, and manufacturing; develop HVM/ATE content; verify post-silicon features; optimize power, performance, area, timing, and test coverage to meet DPM goals.

Design, simulate, validate, and optimize silicon photonic integrated circuits across the chip lifecycle. Lead tape-outs, collaborate with foundries and cross-functional teams, enable high-volume manufacturing, perform reliability and statistical analysis, and develop test plans and documentation to deliver known-good-die photonic solutions.

Design and implement offloading and SYCL infrastructure for Intel compilers. Develop binary formats, device code generation, and offloading models. Collaborate with LLVM/SYCL communities and internal compiler, runtime, and platform teams to deliver production-ready heterogeneous compute solutions for CPUs, GPUs, and accelerators.

The role involves accounting for debt and equity transactions, financial reporting, maintaining internal controls, and supporting treasury activities while ensuring compliance with US GAAP and SOX.

Lead global network operations to ensure resilient, highly available network services across manufacturing sites, labs, offices, campuses, and data centers. Own incident, problem, change, and service management; drive automation, observability, and AI-enabled operations; manage monitoring, capacity, vendor SLAs, and disaster recovery. Mentor global teams, coordinate with architecture, engineering, and cybersecurity, and communicate operational health and major incident responses to senior leadership.

Ensure manufacturing stability for high-volume semiconductor products by analyzing yield and e-test data, leading cross-functional taskforces, managing foundry suppliers, assessing process capability, resolving quality events, and driving continuous manufacturability improvements.

Design, develop, and optimize oneCCL communication library features for low-latency, high-throughput HPC workloads. Collaborate with scientists and hardware teams on Aurora supercomputer integrations, implement and enhance communication protocols, benchmark and analyze performance across configurations, and debug complex cross-layer hardware/software issues.

Design, implement, and optimize distributed LLM inference systems and framework components. Implement distributed algorithms, schedulers, KV cache management, and communication layers. Profile workloads to find bottlenecks, collaborate to improve latency, throughput, scalability, and contribute code, tests, and documentation to internal and open-source projects.