Top Tech Jobs & Startup Jobs

Lead a team of layout engineers developing SRAM, RF, ROM, and CAM memory compiler designs for advanced FinFET and GAA technologies. Oversee floorplanning, placement, routing, physical verification, yield, DFM, parasitic extraction, and reliability signoff. Drive layout methodology innovation and automation using SKILL, Python, Tcl, AI, and machine learning. Mentor senior engineers, manage resources, collaborate with circuit, tiling, and foundry teams, and optimize memory area, performance, power, and yield.

Design, implement, and validate high-speed analog and mixed-signal integrated circuits for silicon photonics and optical interconnect products. Responsibilities include circuit architecture, block-level design, full-chip integration, collaboration with digital and multidisciplinary teams, post-silicon test planning, and technical documentation. The role focuses on low-power, low-voltage designs supporting high-speed optical links from concept through production.

Develop and define integrated front-end and back-end process flows for new nodes; coordinate across lithography, etch, deposition, diffusion, CMP, dielectric and metrology teams; optimize RC performance; establish process windows; analyze yield loss and perform root-cause analysis using SPC/DOE/FMEA; drive corrective actions and control plans; ensure reliability margins (EM, TDDB); support R&D-to-HVM ramp and document process specifications and SOPs.

Designs, implements, and validates high-speed analog and mixed-signal integrated circuits for silicon photonics and optical interconnect products. Responsibilities include circuit architecture, block-level design, full-chip integration, collaboration with digital and multidisciplinary teams, post-silicon test planning, characterization, and technical documentation. The role focuses on low-voltage, low-power designs for high-speed serial links and supports products from concept through production.

Performs functional and pre-silicon verification of GPU graphics, media, and display logic. Develops reusable verification plans, testbenches, simulation models, coverage, and assertions; executes tests, analyzes power and timing, debugs failures, and implements corrective measures. Collaborates with GPU architects, RTL developers, and physical design teams to validate complex features and improve verification infrastructure and methodology.

Lead the design and development of analog and mixed-signal circuits for high-speed IO and connectivity products. Responsibilities include transistor-level design, simulation, verification, optimization, layout collaboration, silicon bring-up, characterization, debugging, and design closure across performance, reliability, and yield metrics. The role also involves cross-functional technical leadership, design reviews, methodology development, and mentoring junior engineers.

Develop and maintain frontend and backend software applications, translating user stories into scalable solutions. Responsibilities include coding, testing, debugging, database optimization, secure development lifecycle activities, CI/CD automation, documentation support, and collaboration with security engineers, product teams, and end users.

Develop pre-silicon verification methodologies for neuromorphic SoC and ASIC architectures across software, RTL, and emulation platforms. Create Python-based directed and random tests, map application requirements to test plans, run regressions, debug failures, track coverage, maintain assertions and scoreboards, and integrate verification IPs. Collaborate with architecture, design, software, and IP teams to validate protocols and improve first-pass silicon success.

Lead strategy, roadmap, and execution for Intel’s data center AI software portfolio. Define enterprise-ready generative AI, agentic, microservices, and turnkey solutions across cloud, hybrid, and on-premises environments. Analyze competitors, develop go-to-market positioning, and grow relationships with cloud providers, ISVs, neoclouds, and open-source communities. Partner with engineering, AI research, silicon architecture, documentation, and developer relations teams to deliver PRDs, deployment blueprints, APIs, SDKs, and validated software offerings.

Enable and optimize Intel IPU solutions for cloud providers by developing targeted IPU software, executing system-level workload testing and debugging across platforms, collaborating with customers and internal teams, and producing technical collateral to support deployment and adoption.