Top Tech Jobs & Startup Jobs

Design and develop CMOS image sensor analog and mixed-signal circuits, including transistor-level schematics, layouts, floorplans, readout circuits, and interfaces. Simulate and verify designs using industry-standard EDA tools, perform DRC, LVS, PERC, and IR-drop checks, and collaborate cross-functionally to debug and optimize fabricated image sensors. Analyze specifications such as speed, noise, linearity, and power while accounting for process variation and operating-condition corners.

Design transistor-level analog and mixed-signal circuits for CMOS image sensors, conduct block, transistor, and whole-chip simulations, and create optimized layouts using Cadence Virtuoso and Calibre. Collaborate with verification, process, test, and application engineers to debug, characterize, and optimize fabricated sensors, supporting products from concept through release.

Manages tier-1 customer accounts and drives regional revenue growth through strategic account management, technical relationship building, opportunity development, forecasting, purchase planning, and order tracking. Collaborates with Business Development, Marketing, and internal teams to pursue opportunities, communicate customer requirements, monitor market trends, and establish industry partnerships.

Characterize and analyze CMOS image sensor performance through bench testing, modeling, simulation, calibration, and image quality evaluation. Troubleshoot chip- and system-level issues with analog and digital design teams, prepare performance reports, and recommend product and process improvements. Develop Python and MATLAB tools to automate data acquisition, processing, visualization, and ISP verification for mobile image sensor projects.

Design and integrate RTL digital logic for image sensor and ISP systems. Responsibilities include chip architecture, sensor timing, image data paths, PPA optimization, physical design collaboration, DFT, verification, chip integration, silicon bring-up, debugging, and image quality tuning. The role requires collaboration with analog, digital, algorithm, application, and physical design teams throughout production readiness.

Conduct performance analysis and improvement studies for CMOS image sensors and camera ISP systems. Support customers, resolve technical issues, and help lead products into mass production. Collaborate with analog and digital design teams, develop and simulate imaging algorithms, analyze image quality, and model imaging system performance. The role requires application engineering experience, programming ability, technical expertise in sensors or ISP systems, and strong English and Japanese communication skills.

Leads ISP RTL hardware design, architecture, verification, power and gate-count optimization using Verilog, SystemVerilog, SystemC, and HLS. Collaborates with algorithm and digital system teams while managing, mentoring, and supervising RTL design engineers. Defines hardware implementations based on product and performance requirements and oversees timely delivery across teams.

Characterize, measure, debug, and analyze CMOS image sensors; develop reports and technical presentations; optimize sensor operating settings; provide technical solutions; lead cross-functional characterization projects; and improve characterization processes, efficiency, and quality while feeding results back to design teams.

Conduct market research and competitive benchmarking for CMOS image sensors; define positioning, pricing, go-to-market strategy, and product lifecycle plans. Translate customer needs into technical requirements, support sensor integration and video quality tuning, resolve field issues, and provide system-level guidance. Develop datasheets, comparisons, setup guides, and training materials while collaborating with engineering, sales, operations, and global teams on product roadmaps and new sensor architectures.

Designs and verifies image sensor control and processing functions, high-speed USB and MIPI interfaces, and full-chip SoC integration. Responsibilities include chip bring-up, validation, debugging, FPGA development, and architecture, register, interface, and design documentation. Requires digital design flow experience including Verilog RTL, simulation, synthesis, static timing analysis, and formality, plus knowledge of high-performance, low-power design, FPGA platforms, emulation, and SoC architecture.