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Design and verify semiconductor device test structures, analyze wafer and silicon testing results, organize device characterization data, and support CMOS image sensor development. The role collaborates with process integration, TCAD, and pixel design teams to meet product requirements and schedules. It requires hands-on layout design, statistical data analysis, semiconductor device knowledge, project coordination, business-level Japanese, and beginner-level English communication.

Develop advanced CMOS and CIS process modules in collaboration with silicon, color, and package foundries. Support production and design teams by improving yield and sensor performance, analyze bench and wafer-level data, and manage silicon split lots according to project goals and schedules. The role applies device physics and process integration expertise to develop new image sensor technologies.

Support and improve analog custom IC design flows across schematic, layout, simulation, and physical verification. Configure and optimize Cadence Virtuoso and foundry PDKs, maintain scripting automation, support Calibre DRC, LVS, and PEX flows, and troubleshoot tool, flow, and PDK issues with analog designers.

Lead product marketing for security-focused CMOS image sensors across North America and Europe. Define products from market and customer needs, develop security system solutions, build partnerships, promote products to customers, and support Sales in expanding into new markets. The role requires technical knowledge of image sensors, camera systems, signal processing, optics, or electro-optics, along with customer engagement and limited travel to trade shows.

Researches, designs, develops, and validates image and color-processing and computer-vision algorithms for digital camera systems. The role expands ISP and computer-vision functionality, quality, and performance; supports hardware implementation and validation; tunes and measures image quality; and documents algorithms.

Lead a hardware verification team developing advanced methodologies for complex SoC designs. Oversee test-plan reviews, execution, analysis, and quality objectives using UVM, co-simulation, emulation, mixed-mode simulation, and formal verification. Apply ASIC verification expertise, EDA tools, programming, and system-level verification practices while coordinating team performance and delivery.

Design and develop analog and mixed-signal circuits for image sensors, including pixel-array readouts, amplifiers, ADCs, and low-noise regulators. Implement transistor-level and layout designs using CAD tools, perform physical verification and system-level simulations, and analyze IR drop and crosstalk. Debug, characterize, and optimize fabricated sensor chips while contributing to reliability, safety, design methodology, project leadership, and mentoring less experienced engineers.

Characterize and evaluate CMOS image sensor pixel performance, develop and maintain evaluation methods and environments, and provide reports and feedback to design, application engineering, and product engineering teams. The role requires sensor or camera ISP knowledge, C/C++ programming, stakeholder communication, and Japanese and English business proficiency.

Design and optimize transistor-level analog and mixed-signal circuits for CMOS image sensors. Perform block, transistor-level, and whole-chip simulations; oversee floor planning and layout using Cadence Virtuoso and Calibre. Define sensor readout timing, collaborate with verification, process, test, and applications teams, and debug and characterize fabricated sensors. Research new circuits, develop innovative solutions, and support products from concept through release.

Design and optimize pixel circuits and photodiodes for image sensors, collaborating with process integration, modeling, characterization, and peripheral circuit teams. Analyze pixel performance issues, improve device and circuit behavior, and develop new image sensor technologies. The role requires extensive pixel optimization and advanced device process experience, with CIS experience preferred. A master’s degree in electrical engineering or physics is required; Japanese and English business proficiency are also required.