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The Engineering Site Manager will establish and lead the Austin engineering site, overseeing operations, mentoring teams, and driving technical execution in collaboration with global teams.

Seeking a Senior Analog Design Engineer to lead the development of complex analog systems for optical communication with over 10 years of experience in analog design.

Lead RTL design verification efforts, manage test bench architecture, and mentor team members. Requires extensive experience in VLSI verification and digital design blocks.

The DFT Tech Lead will define and implement advanced DFT methodologies for complex chips, focusing on DFT strategy, architecture, and debug specifications.

The Senior Embedded SW Engineer will lead DSP firmware development, provide technical guidance, and collaborate with cross-functional teams to drive project success.

Join the silicon design team as a Junior ASIC Back-End Engineer, focusing on physical design and timing closure, while learning from experienced engineers.

The role involves full backend implementation from RTL to GDSII, ensuring design success with a focus on low power and timing closure. Collaboration with design teams and CAD scripting are key responsibilities.

The role involves developing verification strategies for mixed-signal designs, creating behavioral models, and debugging testbenches using UVM and SystemVerilog for high-speed communication technology.

Develop high-end ADC/DAC for optical communication; must have 5+ years in analog circuits, design, development, and verification.

The Senior Verification Engineer will oversee RTL design verification, build test environments, mentor team members, and collaborate on design specifications.