Top Tech Jobs & Startup Jobs

Lead end-to-end solution architecture for Oracle Cloud Fusion Financials, including financial modules, integrations, data flows, governance, controls, reporting integrity, and ERP modernization. Partner with Finance, Enterprise Architecture, and implementation teams to support global financial operations, regulatory compliance, implementations, upgrades, and complex system challenges.

Own functional verification for high-speed SerDes and PHY IP. Architect UVM environments, develop SystemVerilog testbenches, define coverage strategies, execute corner-case and protocol verification, and drive coverage closure through tape-out. Validate equalization, clock-data recovery, training, link bring-up, analog handoffs, and mixed-signal models. Collaborate with analog, digital, SoC, firmware, and post-silicon teams while mentoring engineers and guiding verification methodology, reuse, and automation.

Owns RTL synthesis, SDC constraint development, and static timing analysis for high-speed SerDes digital blocks. Drives timing closure from synthesis through sign-off across advanced-node, multi-mode multi-corner designs. Responsibilities include timing optimization, clock and power-domain strategy, ECO guidance, hierarchical analysis, automation, and collaboration with analog, RTL, physical design, verification, and architecture teams.

Develop and own verification strategies for complex connectivity ASICs and SoCs. Build UVM-based SystemVerilog testbenches, create constrained-random and directed tests, define assertions and coverage models, debug simulation failures, automate regressions, close functional and code coverage, and support root-cause analysis and silicon bring-up for PCIe, UALink, and UCI products.

Lead functional verification for advanced ASICs and SoCs, including test planning, SystemVerilog/UVM development, constrained-random testing, debugging, coverage analysis, and coverage closure. Collaborate with RTL designers, software teams, and system validation teams on emulation and hardware-software co-verification. Drive verification methodologies for server and networking applications, including switching architectures, packet processing, PCIe, Ethernet, and NoC designs.

Leads strategic sourcing across semiconductor supply-chain categories including foundries, OSATs, substrates, and test providers. Develops category strategies, analyzes supplier capabilities and costs, builds should-cost and TCO models, negotiates complex agreements, manages supplier relationships, mitigates supply risk, and aligns sourcing decisions with technology roadmaps. Partners with engineering, R&D, and global stakeholders to support product development, capacity, cost savings, supplier performance, and business continuity.

Design, develop, and deploy LLM-powered agentic applications for RTL, physical and analog design, linting, static analysis, and formal verification. Build engineering assistants, dialogue systems, retrieval infrastructure, databases, and dashboards integrated with CAD/EDA workflows. Collaborate with hardware design, design verification, formal verification, and CAD teams to identify challenges and deliver AI-assisted tools. Apply software engineering and AI/ML expertise to accelerate debugging, coverage closure, lint analysis, RTL optimization, and formal proof convergence.

Leads end-to-end engineering programs for analog/mixed-signal semiconductor IP, from specification through tape-out and silicon validation. Coordinates circuit design, layout, verification, systems, product, operations, foundries, and vendors. Owns schedules, milestones, budgets, metrics, risks, stakeholder communication, and program reviews while driving process improvements and resolving cross-functional blockers.

Lead the end-to-end development and technical direction of internal automation platforms. Build full-stack features, backend services, frontend interfaces, databases, access controls, approval workflows, dashboards, and integrations with SaaS, cloud, and identity systems. Automate IT, HR, and Finance workflows involving onboarding, offboarding, asset tracking, entitlements, audit logging, and access reviews. Personally write code, evolve schemas, maintain testing, establish engineering standards, and use AI-assisted development tools.

Architects and develops firmware and microcontroller subsystems for SoC and systems products. Responsibilities include C/C++ firmware and SDK development, Python scripting, HW-SW interface implementation and testing, unit testing, build automation, source control, CI workflows, and collaboration with hardware designers and customers. Preferred work includes RTOS, boot ROM, pre-silicon simulation and emulation, and secure boot technologies.