Top Tech Jobs & Startup Jobs

Leads strategic UX research for AI and developer platforms, studying tools, APIs, runtimes, documentation, workflows, and agent-mediated experiences. The researcher identifies high-value questions, applies qualitative and quantitative methods, influences product and platform direction, and translates insights into design principles and recommendations. Responsibilities include engaging developers, customers, and partners; representing user needs in leadership and roadmap discussions; and mentoring peers to improve evidence-based research practices.

Develop system-level stress workloads and validation tests for Arm SoC processors in Linux and bare-metal environments. Characterize silicon, debug system and silicon issues, create test plans, and perform root-cause analysis using laboratory and debugging equipment. The role requires pre- and post-silicon validation experience, software engineering skills in C/C++, ARM assembly, Python, and scripting, plus knowledge of power, performance, and hardware interfaces.

Develop reusable Python-based software infrastructure for post-silicon validation and characterization of Arm SoCs. Build automation, frameworks, APIs, and CI or regression infrastructure for workloads, hardware controls, instrumentation, test execution, and data collection. Collaborate with firmware, validation, systems, and infrastructure teams to debug complex hardware-software interactions and create reliable, scalable engineering workflows.

Characterize and validate DDR/LPDDR memory subsystems in next-generation Arm SoCs across process, voltage, temperature, and frequency conditions. Develop system-level stress workloads and test plans for Linux and bare-metal environments, analyze characterization data, debug silicon and system issues, and improve performance. Collaborate with post-silicon validation teams and cross-functional engineering groups while evaluating memory stability, operating margins, failure behavior, and silicon performance.

Characterize and validate PCIe interfaces on next-generation Arm SoCs across process, voltage, temperature, and frequency conditions. Develop system-level stress workloads and characterization tests in Linux and bare-metal environments, analyze silicon performance data, debug PCIe and system issues, and collaborate with validation teams to improve silicon performance and resolve defects.

Develop cycle-accurate performance models for coherent and non-coherent Arm interconnects. Collaborate with micro-architects, RTL, validation teams, and customers to assess architectural trade-offs, develop features, build performance test suites, identify bottlenecks, and deliver data-driven system performance insights. The role requires strong C++, SystemC TLM, and Python skills, plus expertise in SoC performance modeling and computer architecture.

Designs, verifies, and optimizes 2.5D and 3D system-in-package layouts for next-generation SoCs. Responsibilities include package routing, bump-map and ball-pattern optimization, stack-up and power-distribution design, feasibility studies, DFM/DFA implementation, vendor coordination, methodology development, and mentoring team members using Cadence APD and SiP tools.

Coordinates electronic prototype and PCB new product introductions from design readiness through manufacturing and testing. Works with engineering, procurement, suppliers, and contract manufacturers to ensure materials, tooling, documentation, test strategies, and schedules are aligned. Supports DFM/DFA reviews, drives build issue resolution and root-cause analysis, maintains NPI documentation, manages supplier and manufacturing risks, and improves build quality and readiness. Travel to manufacturing locations may be required.

Leads project management across AI and Developer Platforms, establishing scalable operating models, planning frameworks, governance, risk management, and delivery standards. Manages and develops a distributed Project Management team, oversees portfolio and execution rhythms, aligns cross-functional stakeholders, resolves trade-offs, and provides leadership visibility into progress, dependencies, risks, resources, and outcomes. Uses data, automation, dashboards, and AI to improve delivery efficiency and organizational decision-making.

Develop and analyze memory controller IP and system performance models for Arm-based SoCs. Optimize power, performance, and microarchitecture using workload analysis, simulation, and emulation. Create performance methodologies, identify system bottlenecks, guide internal teams and partners, correlate models with RTL, and mentor engineers. Requires strong computer architecture expertise, C++ development, scripting, and experience with memory or interconnect performance modeling.