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Seeking a SoC Performance and Power Modeling Architect with extensive experience in performance modeling, workload characterization, and architectural solutions for semiconductor design.

The Senior/Staff Design Verification Engineer will be responsible for design verification in coherent interconnects. Specific responsibilities are not detailed, but expertise in this area is expected.

As an Applications Engineer, you will support semiconductor companies by debugging customer issues, leading training sessions, and contributing to design improvements.

The role involves designing optimized system architectures for automotive and robotics applications using machine learning. Responsibilities include performance analysis and collaboration with various engineering teams. Required experience includes AI/ML algorithm architecture and knowledge of computer architecture.

As a Principal Engineer, you will enhance chip design techniques, develop implementation methodologies, analyze design efficiency, and support design teams to optimize ARM's IP across multiple divisions.

The RTL Design Engineer will design and analyze high-performance interconnects, ensuring they meet functional, performance, power, and area goals.

As a Principal Performance Applications Engineer, you'll guide partners in performance debugging and optimization, engage with Arm's tools, and develop training on SoC and performance tooling.

The Principal Package Layout Engineer will define, design, and verify package designs, working closely with teams on complex SoC implementations focusing on IoT, Automotive, and Compute applications.

Lead the strategy and execution of Arm's Compute Subsystem and IP portfolio, focusing on product management and collaborating with engineering and commercial teams to enhance performance and scalability.

Lead verification of Third-Party IPs for Silicon demonstrators, ensuring compliance with SoC design flow and DFX requirements, while managing automation tasks and collaborating with design teams.