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Design, implement, and optimize Ambiq's embedded AI runtimes and operator libraries for on-device inference. Build profiling, benchmarking, and regression tests; optimize latency, memory, and energy on constrained hardware; support customer integrations across bare metal and RTOS toolchains; and maintain docs, tooling, and upstream/fork health.

The role involves building and optimizing embedded AI runtimes, implementing ML operator kernels, and improving performance for on-device AI in resource-constrained environments.

The Sr Multimedia Architect will define low-power SoC multimedia specifications, collaborate with cross-functional teams, and oversee integration and validation processes for embedded systems targeting wearable and IoT devices.

The Principal Embedded Software Architect will design the software architecture for low-power Edge AI MCUs, leading decisions for functionality and performance, partnering with hardware teams, and mentoring engineers.

The Sr. Director of Front End Engineering will drive innovation in semiconductor solutions, oversee engineering teams, and ensure project success with customer-centric solutions.

Lead the development of the GPU software stack for Ambiq's MCU platforms, defining GPU HAL, implementing graphics APIs, and conducting silicon bring-up.

Design, train, optimize, and deploy efficient on-device ML models (audio and vision) for resource-constrained products; maintain Ambiq ADKs; port and optimize customer models; apply model-efficiency techniques; produce customer-facing demos, docs, and benchmarks.

Lead design and implementation of HAL, device drivers, RTOS ports, and test cases for NPU, DMA/DME, and memory subsystems. Support pre-/post-silicon bring-up, verification, performance optimization, debugging, and cross-team/customer support.

Lead development and testing of Ambiq's embedded graphics SDK and GPU HAL for MCU platforms. Design, implement, and maintain graphics APIs, GPU and display HALs; develop example apps and tests; perform pre-silicon FPGA verification, post-silicon bring-up, system validation, and hands-on debugging; support DV, field engineers, and customers.

Lead and scale the physical implementation organization for ultra-low-power MCU products. Define strategy, build and mentor teams, oversee full-chip and block-level physical design (floorplanning, power planning, CTS, P&R, timing closure, DRC/LVS, EM/IR signoff), collaborate cross-functionally, manage schedules and tape-out readiness, and ensure first-silicon success and manufacturability.