RTL2GDS AE Architect

Reposted 2 Days Ago
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San Jose, CA, USA
In-Office
162K-302K Annually
Expert/Leader
Artificial Intelligence • Cloud • Hardware • Software • Semiconductor
The Role
Provides customer-facing technical expertise for digital IC implementation and signoff using Cadence technologies. Deploys PPA methodologies, leads technical evaluations, supports synthesis, place-and-route, timing and power signoff, guides customers toward design and schedule goals, and collaborates with R&D to improve tools and flows. The role requires extensive hands-on digital design experience, advanced-node expertise, scripting proficiency, and strong communication skills.
Summary Generated by Built In
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

As an expert Digital Implementation Field Applications Engineer (AE) , you will work side-by-side with our leading edge customers. With your expertise, you'll help deploy Cadence’s market-leading technologies in Synthesis, P&R, and Signoff to meet/exceed their PPA targets, achieve faster design closure, and turn their design concepts into reality. The greater your powers, the more business opportunities you'll help bring to the table. You will also work directly with the Cadence R&D group to drive the customer requirements and influence the direction of Cadence next-generation products and technologies.


Key Responsibilities

  • Explore and Deploy Latest PPA methodologies/flows on Next generation Customer Designs
  • Drive technical evaluations/benchmarks to success
  • Provide technical support to Cadence customers in the areas of Backend Digital Design Implementation and Signoff
  • Guide customers on how to best utilize Cadence technologies to achieve their design goals and meet project schedules
  • Work closely with R&D to enhance the tools and methodologies to meet and exceed customer’s requirements
  • Drive adoption and proliferation of Cadence tools and technologies 
  • Efficiently translate customer requirements into tool solutions by working closely with R&D

Job Requirements

  • Minimum 10+ years of industry, hands on experience in Digital Design and Static Timing Analysis
  • Prior experience with IC digital implementation flows - Synthesis, Place and Route, IR Drop, Timing Signoff
  • Prior experience with Cadence tools (Genus, Innovus, Conformal, Tempus, Modus, Voltus) or ICC, ICC2, DC, FC , Primetime
  • Experience with advanced nodes 5nm and below
  • Expertise in scripting languages as Tcl/Perl/Python/shell is a must
  • Strong customer-facing communication and problem-solving skills
  • Strong verbal, written, and customer communication skills
  • BS degree (or higher) in Computer/Electrical Engineering

The annual salary range for California is $162,400 to $301,600. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.

We’re doing work that matters. Help us solve what others can’t.

Skills Required

  • 10+ years of hands-on industry experience in digital design and static timing analysis
  • Experience with IC digital implementation flows, including synthesis, place and route, IR drop, and timing signoff
  • Experience with Cadence Genus, Innovus, Conformal, Tempus, Modus, and Voltus, or Synopsys ICC, ICC2, Design Compiler, Fusion Compiler, and PrimeTime
  • Experience with advanced semiconductor nodes of 5nm and below
  • Expertise in Tcl, Perl, Python, or shell scripting
  • Strong customer-facing communication and problem-solving skills
  • Strong verbal, written, and customer communication skills
  • Bachelor's degree or higher in Computer Engineering or Electrical Engineering

Cadence Design Systems Compensation & Benefits Highlights

The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Cadence Design Systems and has not been reviewed or approved by Cadence Design Systems.

  • Equity Value & Accessibility — A discounted ESPP with a lookback feature and equity included in total compensation make ownership broadly accessible and potentially meaningful. Structured compensation at an industry leader adds predictability to equity participation.
  • Healthcare Strength — Medical, dental, and vision coverage are described as solid, with mental‑health/EAP and fertility support enhancing the offering. The breadth across core care and family‑building needs strengthens the healthcare package.
  • Leave & Time Off Breadth — Global Recharge Days, volunteer time off, and companywide breaks indicate a comprehensive time‑off framework. In addition, many salaried roles are described as having flexible or generous PTO policies.

Cadence Design Systems Insights

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The Company
HQ: San Jose, CA
8,216 Employees
Year Founded: 1988

What We Do

Cadence enables electronic systems and semiconductor companies to create the innovative end products that are transforming the way people live, work and play. Cadence® software, hardware and IP are used by customers to deliver products to market faster. The company's Intelligent System Design strategy helps customers develop differentiated products—from chips to boards to intelligent systems—in mobile, consumer, cloud, data center, automotive, aerospace, IoT, industrial and other market segments. Cadence is listed as one of Fortune Magazine's 100 Best Companies to Work For.

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