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Drive technology transfer and manufacturability of discrete power FETs from concept through high-volume manufacturing. Partner with fab process owners to optimize processes, perform device characterization and failure analysis, lead root-cause investigations using DOE/SPC/6-sigma/FMEA, and collaborate with cross-functional teams to integrate devices into system solutions while presenting technical results to executives.

Lead technology transfer and manufacturability for discrete power FETs from concept through high-volume manufacturing. Optimize fab process windows, perform device characterization and failure analysis, drive root-cause problem solving (DOE, SPC, FMEA), collaborate across engineering, packaging, and applications teams, and present technical results to executives.

Drive technology transfer and manufacturability for discrete power FETs from concept through high-volume production. Monitor and optimize electrical/device performance, perform characterization and failure analysis, partner with fab/process owners to resolve integration challenges, apply DOE/SPC/6‑sigma/FMEA for yield and reliability, and mentor junior engineers while presenting technical outcomes to executives and customers.

The Senior Program Manager will oversee the development and commercialization of power management products, managing schedules, coordinating teams, and ensuring project success from concept to launch.

Provide technical leadership for RIE module performance across safety, yield, availability, cost, and output. Define module strategy, architect control approaches (SPC/FDC/APC), drive root-cause resolution, lead cross-functional teams, influence capital decisions, and develop engineering talent to support high-volume semiconductor manufacturing.

The Senior Program Manager will oversee the development and commercialization of power management products, manage schedules, coordinate stakeholders, and ensure technical support through various phases of product development.

Drive technology transfer and manufacturability of discrete power FET technologies. Collaborate with teams, optimize performances, and lead root-cause analysis for improvements.

Lead vertical GaN technology scale-up through process integration, device and test‑chip design, experiment design, and process qualification. Drive root‑cause analysis, optimize yield/reliability, mentor junior engineers, present to executives, and transition technologies into early manufacturing.

Design and lead development of mixed-signal and power management ICs from specification through silicon. Define simulations, work with layout, drive verification and tape-out, support qualification and manufacturing, improve yield, and resolve customer issues while managing project schedules and technical deliverables.

Lead new product development for semiconductor analog/mixed-signal devices: define DfT strategies, develop ATE test plans and low-level test code, own pre- and post-silicon bring-up, validation, characterization and qualification, and optimize test programs for cost, yield, and quality while coordinating with design, vendors, and factories.