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Lead and execute IT and security audits of manufacturing systems and external partners, assess third-party IT risk (foundries, OSATs, ODMs), review network, access controls, APIs and data exchanges, validate data integrity into data warehouses using analytics, and produce executive audit reports while driving remediation and managing on-site partner coordination and Tier-3 escalations.

As a Senior Memory System Engineer, you'll analyze memory technologies, collaborate with various engineering teams, and design memory architectures for NVIDIA SOCs.

Lead performance and scalability characterization of the DGX Cloud stack across Kubernetes and NVIDIA components. Design automated workload tests, build monitoring and CI/CD frameworks, triage large-scale Kubernetes issues, collaborate with researchers and upstream open-source communities, and present findings externally.

As a Senior Software Engineer at NVIDIA, you'll develop verification processes, implement features for NVIDIA Switch and GPUs, and collaborate in software development. You'll work in dynamic environments, leverage C++ and Python expertise, and understand networking technology.

The Senior I/O Subsystem Architect will design and define chip-to-chip communication standards, leading projects from concept to deployment while collaborating with various teams to develop interconnect technology.

The Formal Verification Engineer ensures functional correctness of next-gen chip designs, implementing verification methodologies and collaborating with engineers to define and execute test plans.

The role involves automating project management methodologies using Python and AI, creating scalable software solutions for VLSI project management, and enhancing internal processes through DevOps.

Design, build, and operate HTOL/burn-in boards and ovens per JEDEC. Perform thermal management, test-script/vector debugging, data analysis (Python/MATLAB), vendor collaboration, and reliability database improvements to ensure silicon reliability.

Lead SoC-level verification as the primary Person-in-Charge: own verification plans, schedules, and sign-off from conception through tape-out. Coordinate across architects, IP owners, emulation/FPGA teams, and infrastructure; track status and risks, drive mitigation plans, and evolve SoC verification flows and methodologies to achieve coverage and tape-out criteria.

As a Senior ASIC Design Engineer at NVIDIA, you will improve methodologies and deliver system-level IP for performance measurement in GPUs and SOCs, requiring strong RTL design and verification skills.