Top Tech Jobs & Startup Jobs

Design, develop, and deliver firmware, embedded software, device drivers, microcode, and control software for datacenter-scale systems. Own projects throughout the product lifecycle, including bring-up, debugging, validation, automation, customer trials, field support, and production sustainability. Collaborate with multidisciplinary and partner engineering teams while contributing expertise in Linux, firmware, hardware interfaces, management protocols, secure boot, and datacenter networking. The role also involves mentoring and cross-functional collaboration.

Performs full physical IC design from RTL through silicon tape-out, including synthesis, physical verification, timing closure, EM/IR analysis, place and route, clock tree synthesis, floor planning, layout, and methodology development. Collaborates with RTL engineers and develops design flows using TCL and Perl. This is an on-site role in Colorado Springs.

Performs full physical IC design from RTL through silicon tape-out, including synthesis, physical verification, timing closure, EM/IR analysis, place and route, clock tree synthesis, floorplanning, layout, and methodology development. Collaborates with RTL engineers and works onsite in Colorado Springs.

Performs end-to-end physical IC design from RTL through silicon tape-out, including synthesis, physical verification, timing closure, EM/IR analysis, place and route, clock tree synthesis, floor-planning, layout, and methodology development. Collaborates with RTL engineers and works on PCIe switch and enterprise storage products. This is an on-site role in Colorado Springs, Colorado.

Designs and implements high-performance digital IC RTL for PCIe switch and enterprise storage products. Responsibilities include architecture analysis, microarchitecture development, Verilog/SystemVerilog coding, timing closure, RTL debugging, third-party IP integration, cross-functional issue resolution, and silicon validation support. The role is fully onsite and supports advanced AI/ML data center ecosystems.

Develop and maintain low-level firmware for ARM-based storage controllers, focusing on RAID functionality and PCIe, NVMe, SAS, and SATA protocols. Responsibilities include feature design, implementation, debugging, log analysis, issue resolution, product validation, release support, and hardware integration. The engineer will troubleshoot firmware-hardware interactions using DSTREAM and logical analyzers and collaborate with hardware and validation teams throughout the development lifecycle.

Design complex flip-chip BGA packages for high-performance ASICs used in AI, networking, HPC, and 5G applications. Responsibilities include package layout, signal and power integrity, thermal performance, reliability, manufacturability, project scheduling, customer interface, and collaboration with internal and vendor teams. The role also supports process improvement, documentation, automation, and multi-project execution.

Performs ASIC and SoC design implementation at block and full-chip levels, including floor planning, partitioning, placement, clock tree synthesis, routing, timing analysis and closure, physical verification, formal equivalence checks, ECOs, and power optimization. The engineer drives implementation tools and methodologies to achieve PPA targets and successful tapeouts, particularly for 7nm or smaller process technologies, while collaborating effectively in global teams.

Lead product execution and delivery for Broadcom’s Mainframe Resource Intelligence SaaS product. Prioritize roadmaps, backlogs, features, and support issues; translate customer needs into functional stories; remove cross-team roadblocks; and partner with engineering, architecture, UX, and stakeholders. Present product capabilities, manage customer requests, evaluate AI and machine learning opportunities, and track adoption, retention, OKRs, and KPIs.

Develop innovative software solutions for Broadcom’s Core Infrastructure team. Responsibilities include working in an Agile Scrum environment, participating in design, code, and test-plan reviews, and creating automated test scripts. The role requires mainframe development experience on VSE, z/VM, or z/OS platforms, strong Assembler skills, and expertise with VSE subsystems such as POWER and CICS.