Top Tech Jobs & Startup Jobs

Lead business development and sales for Intel Foundry Services, managing sales plans, customer relationships, and negotiating contracts. Develop strategies to drive revenue and ensure customer satisfaction.

Develop and maintain MSVC compiler backend optimizers and code generation for Intel architectures. Drive performance improvements, collaborate with hardware architects, validate correctness via benchmarking and profiling, resolve performance bottlenecks, incorporate research advances, and mentor junior engineers.

The role involves providing technical support for Intel Ethernet products, collaborating on solutions, managing customer feedback, and evaluating tools to enhance performance in networking solutions.

The role involves physical design implementation of custom CPU designs, including synthesis, static timing analysis, verification, and collaborating to optimize CPU parameters. Leadership and communication skills are essential.

The Lead Analog SerDes Architect will define circuit architecture for optical interconnects, leading design work, collaborating with teams, and guiding junior engineers.

The Device Engineer will develop and customize CMOS technologies for high volume manufacturing, collaborating with cross-disciplinary teams to enhance device performance and efficiency.

Provide Level 2 database and data loader support for automated manufacturing: troubleshoot database systems, maintain data integration processes, manage monitoring/alerting, resolve incidents, support end-users, and follow ITIL/Agile practices in a 24x7, 12-hour shift environment.

Drive requirements, development, qualification, and deployment of factory automation for process, metrology, and material handling in assembly factories. Perform gap analysis, solution design, FMEA, manage software product lifecycle, engage partners and suppliers, troubleshoot, and communicate status to stakeholders while collaborating in matrix teams.

Develop and integrate high-performance Network-on-Chip (NoC) and interconnect fabrics into SoC platforms. Define system-level requirements, integrate IP blocks, collaborate with architecture and physical design teams, analyze PPA trade-offs, support debug/validation and bring-up, and mentor junior engineers while driving scalable silicon solutions across global teams.

Define and develop power-efficient SoC architecture and system-level power management for next-generation client and AI platforms. Drive power integration across IP, evaluate trade-offs, define features and specs, collaborate with hardware and software teams through silicon bring-up and HVM, analyze post-silicon power/performance data, and support debugging and continuous improvement.