Top Tech Jobs & Startup Jobs

Develop and execute verification plans and testbenches for interconnect and chassis IP; build reusable verification components, constrained-random tests, and debug infrastructure; perform simulation and formal verification, analyze failures, close bugs, plan functional coverage, and improve verification automation and regression quality.

Drive yield improvements for advanced semiconductor logic nodes by identifying root causes, designing experiments, analyzing manufacturing data, and enabling process and equipment optimizations. Collaborate cross-functionally to support product ramps, DFT/DTCO activities, and factory task forces while developing measurement protocols, performing statistical analysis, and translating results into actionable process roadmaps.

Develop and execute mixed-signal IP verification plans, build UVM/OVM testbenches, perform analog behavioral modeling, debug presilicon issues, analyze coverage, and collaborate cross-functionally to meet design, power, and performance targets.

The CPU Physical Design Engineer will implement custom CPU designs, conduct physical design flow, optimize designs, and collaborate on verification processes. They will work with EDA vendors and enhance methodologies for CPU design.

The role involves analyzing user information, documenting business processes, training users, supporting testing, and managing data configurations with Windchill PLM.

Develop communication libraries for high-performance computing, optimizing software, collaborating with scientists, and resolving distributed computing challenges.

As a CPU Physical Design Engineer, you'll implement custom CPU designs from RTL to GDS and conduct all aspects of the physical design flow including synthesis, place, and route. You'll verify designs and collaborate with various teams to enhance microarchitectures.

The role involves performing physical design implementation, conducting verification and signoff, optimizing CPU design, and collaborating with various teams. Key responsibilities include synthesis, place and route, and static timing analysis.

Design and optimize advanced embedded memory IP (SRAM, register files, ROM) for Intel CMOS processes. Perform memory pathfinding, PPA optimization, custom circuit design, layout and automation, pre-silicon verification and post-silicon validation/debug to enable yield and product ramp. Collaborate with domain experts, EDA vendors, and product teams to deliver memory collaterals and test chips.

Develop and enable CMP and other semiconductor fabrication processes for current and future device architectures. Lead process design, parameter optimization, equipment and metrology integration, feasibility studies, and vendor partnerships. Drive process improvement, perform simulations and experimental work, and develop roadmaps to support high-volume manufacturing and novel device technologies.