CPU Physical Design Engineer

Posted 12 Hours Ago
Be an Early Applicant
Austin, TX, USA
In-Office
106K-200K Annually
Mid level
Artificial Intelligence • Cloud • Information Technology • Software
Creating world-changing technology that enriches the lives of every person on earth.
The Role
The role involves performing physical design implementation, conducting verification and signoff, optimizing CPU design, and collaborating with various teams. Key responsibilities include synthesis, place and route, and static timing analysis.
Summary Generated by Built In
Job Details:

Job Description: 

Intel is shaping the future of technology to help create a better future for the entire world. Our work in pushing forward fields like AI, analytics, and cloud-to-edge technology is at the heart of countless innovations. With a career at Intel, you'll have the opportunity to use technology to power major breakthroughs and create enhancements that improve our everyday quality of life. Join us and help make the future more wonderful for everyone.

Life at Intel

As a member of Intel's CPU development team, you will have a front seat in designing the latest core IP to power cutting edge compute processors across client, server, IOTG and AI. We innovate state of the art microprocessor architecture on the most advanced and latest process technologies with a focus on power efficiency. Our core designs are present in nearly all segments of Intel's compute roadmap.
Job responsibilities include but are not limited to:

  • Performs physical design implementation of custom CPU designs from RTL to GDS to create a design database that is ready for manufacturing.
  • Conducts all aspects of the CPU physical design flow including synthesis, place and route, clock tree synthesis, floor planning, static timing analysis, power/clock distribution, reliability, and power and noise analysis.
  • Conducts verification and signoff including formal equivalence verification, static timing analysis, reliability verification, static and dynamic power integrity, layout verification, electrical rule checking, and structural design checking. Analyzes results and makes recommendations to improve current and future CPU microarchitectures closely collaborating with logic, circuit, architecture, and design automation teams.
  • Possesses CPU specific expertise in various aspects of structural and physical design, including physical clock design, timing closure, coverage analysis, multiple power domain analysis, structured placement, routing, synthesis, and DFT.
  • Works intimately with industry EDA vendors to build and enhance tool capabilities to design a highspeed, low power synthesizable CPU.
  • Optimizes CPU design to improve product level parameters such as power, frequency, and area. Participates in the development and improvement of physical design methodologies and flow automation.

Qualifications:

Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.
Minimum Qualifications:

  • Bachelors in Computer Engineering or Electrical Engineering or related field with 3+ years of relevant work experience or M.S. in Computer Engineering or Electrical Engineering or related field (or higher degree) with 2+ years of relevant work experience. 
  • 2+ years' experience in Synthesis of a digital logic block or partition.

2+ years of experience in each of the following:

  • Experience with integrated circuit design tools (ex: Synopsys/Cadence), including logic synthesis, place and route, static timing analysis and design closure.
  • PV convergence (such as static timing and power analysis).
  • Chip physical design verification including formal equivalence, electrical rules, DRC/LVS, and Noise flow.
  • TCL Scripting.

Preferred Qualifications:

  • Knowledge with Physical design best known practices concerning floor-planning, routing techniques, clock distribution.
  • At least 1 Completion of Tape Out on advanced technologies.
  • Knowledge of Static Timing Analysis, Noise analysis, and reliability verification techniques.
  • Knowledge of RTL to GDS methodologies and formal equivalence
  • Experience performing CPU level timing analysis and optimization, ensuring designs meet functional and performance requirements.
  • Experience generating and verifying timing constraints while addressing timing violations at the chip or block level for CPU cores.
  • Experience working closely with the clocking team and full-chip designers to balance timing fixes, power delivery, clocking, and partitioning.

Benefits at Intel

Our total rewards package goes above and beyond just a paycheck. Whether you're looking to build your career, improve your health, or protect your wealth, we offer generous benefits to help you achieve your goals. Go to Intel Benefits | Intel Careers for details of benefits available to you. Intel reserves the right to modify, change or discontinue benefit plans at any time in its sole discretion.

          

Job Type:Experienced Hire

Shift:Shift 1 (United States of America)

Primary Location: US, Texas, Austin

Additional Locations:

Business group:Intel makes possible the most amazing experiences of the future. You may know us for our processors. But we do so much more. Intel invents at the boundaries of technology to make amazing experiences possible for business and society, and for every person on Earth. Harnessing the capability of the cloud, the ubiquity of the Internet of Things, the latest advances in memory and programmable solutions, and the promise of always-on 5G connectivity, Intel is disrupting industries and solving global challenges. Leading on policy, diversity, inclusion, education and sustainability, we create value for our stockholders, customers, and society.

Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/ABenefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.



Annual Salary Range for jobs which could be performed in the US: $105,650.00-200,340.00 USD

The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

*

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

Skills Required

  • Bachelors in Computer Engineering or Electrical Engineering or related field with 3+ years of relevant work experience or M.S. in related field with 2+ years of relevant work experience
  • 2+ years' experience in Synthesis of a digital logic block or partition
  • 2+ years of experience with integrated circuit design tools including logic synthesis, place and route, static timing analysis and design closure
  • 2+ years experience with PV convergence (such as static timing and power analysis)
  • 2+ years of Chip physical design verification including formal equivalence, electrical rules, DRC/LVS, and Noise flow
  • Experience with TCL Scripting

Intel Compensation & Benefits Highlights

The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Intel and has not been reviewed or approved by Intel.

  • Parental & Family Support Family-building and caregiving supports are extensive, including fertility coverage, adoption assistance, paid parental leave, childcare and elder care resources, and a structured reintegration for new parents. These benefits are positioned as best-in-class elements of the package.
  • Leave & Time Off Breadth Time off includes generous PTO, a paid sabbatical after extended tenure, and multiple leave types such as family, medical, bereavement, and military. This breadth enables employees to disconnect, recharge, and manage life events.
  • Retirement Support Long-term savings are bolstered by a competitive 401(k) match and access to deferred compensation for eligible levels, alongside stock purchase opportunities. These programs are highlighted as strong tools for financial security.

Intel Insights

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The Company
HQ: Santa Clara, CA
75,000 Employees
Year Founded: 1968

What We Do

Our mission is to shape the future of technology to help create a better future for the entire world, that’s the power of Intel Inside. With more ingenuity and creativity inside, our work is at the heart of countless innovations. From major breakthroughs to things that make everyday life better— they’re all powered by Intel technology. With a career at Intel, you can help make the future more wonderful for everyone.

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