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Reposted 20 Days AgoSaved
In-Office
Mountain View, CA, USA
186K-240K Annually
Mid level
186K-240K Annually
Mid level
Artificial Intelligence • Hardware • Machine Learning • Software
Research and model performance of Lightmatter-enabled hardware systems for ML training and inference. Build performance modeling tools, design rack-scale reference platforms, collaborate with product and engineering, publish academic and industry research, and act as the in-house ML systems expert.
Top Skills: Deep Learning FrameworksEthernetGpusInfinibandLarge Language ModelsNvlinkPassageSilicon PhotonicsTpus
21 Days AgoSaved
In-Office
Mountain View, CA, USA
139K-190K Annually
Senior level
139K-190K Annually
Senior level
Artificial Intelligence • Hardware • Machine Learning • Software
Designs, tests, analyzes, integrates, qualifies, and documents mechanical hardware for AI server chassis and rack platforms. Responsibilities include CAD, drawings, BOMs, thermal and structural analysis, prototype builds, design reviews, root-cause investigations, contract manufacturer oversight, supply-chain coordination, and production scaling. The role focuses on electronics and photonics packaging, thermal management, manufacturability, and collaboration with cross-functional engineering and program teams.
Top Skills: 3D PrintingAnsysFlothermIcepakSolidworks
Reposted 21 Days AgoSaved
In-Office
Mountain View, CA, USA
220K-270K Annually
Senior level
220K-270K Annually
Senior level
Artificial Intelligence • Hardware • Machine Learning • Software
The Staff Physical Design Engineer will implement digital blocks using advanced tech nodes, focusing on timing closure and power integrity, while collaborating with teams on ASIC design.
Top Skills: Cadence ToolsPythonShellTcl
Reposted 21 Days AgoSaved
In-Office
Boston, MA, USA
217K-267K Annually
Senior level
217K-267K Annually
Senior level
Artificial Intelligence • Hardware • Machine Learning • Software
Implement and sign off complex digital blocks from synthesis through physical verification in advanced process nodes. Drive full-chip STA and timing closure, power analysis, floorplanning, IO and clock distribution, DRC/LVS cleanup, and functional/timing ECOs. Automate flows with TCL/Python/Shell, collaborate across teams, and work with EDA vendors to resolve tool issues.
Top Skills: 3Nm Process NodeAsic Physical DesignCadenceDrcEm/Ir Signoff ToolsLvsPythonShellSilicon Photonics LayoutSta (Static Timing Analysis)Tcl
Reposted 24 Days AgoSaved
In-Office
2 Locations
230K-267K Annually
Expert/Leader
230K-267K Annually
Expert/Leader
Artificial Intelligence • Hardware • Machine Learning • Software
The Photonics Technical Lead will create scalable laser solutions for silicon photonics AI communications, collaborating across teams to ensure design feasibility and meet performance specifications.
Top Skills: Control SystemsHardware EngineeringPhotonic DevicesPhotonic Integrated CircuitsSemiconductor PhysicsSilicon Photonics
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Reposted 24 Days AgoSaved
In-Office
Mountain View, CA, USA
180K-212K Annually
Senior level
180K-212K Annually
Senior level
Artificial Intelligence • Hardware • Machine Learning • Software
Lead development and qualification of silicon foundry processes for integrated photonic AI platforms. Define process flows, collaborate with foundries and design teams, establish yield and reliability metrics, and drive product tapeout through production and lifetime characterization.
Top Skills: 3D-Stacked PhotonicsChiplet Communication FabricDfmPackage IntegrationPackaging TechnologyPhotonicsSilicon Foundry ProcessesSilicon Process ControlTapeoutYield Monitoring
Reposted 28 Days AgoSaved
In-Office
Boston, MA, USA
206K-236K Annually
Senior level
206K-236K Annually
Senior level
Artificial Intelligence • Hardware • Machine Learning • Software
Lead design verification for integrated digital, analog, and photonic devices using UVM, mixed-signal/AMS methods, RNM, and emulation. Define DV methodology, create reusable testbenches, run block and full-chip verification, integrate analog IP and behavioral models, close coverage and signoff, and collaborate with architects and designers for performance and post-silicon validation.
Top Skills: AmsBehavioral ModelingEmulationFormal VerificationMixed-Signal SimulationModelsimPerformance ModelingPost-Silicon ValidationPythonQuestaReal Number Modeling (Rnm)SystemverilogUvmVcsXcelium
Reposted 28 Days AgoSaved
In-Office
2 Locations
217K-325K Annually
Expert/Leader
217K-325K Annually
Expert/Leader
Artificial Intelligence • Hardware • Machine Learning • Software
The Sr./Principal Mixed-Signal Digital Architect will design digital circuits for photonic-based communication, collaborate with teams, and lead product development.
Top Skills: Cad ToolsChip DesignDigital Design FlowFirmwareHigh-Speed Ams ElectronicsIbis-Ami SimulatorsMatlabPythonSoftwareSpice Simulators
Reposted 28 Days AgoSaved
In-Office
Mountain View, CA, USA
187K-260K Annually
Senior level
187K-260K Annually
Senior level
Artificial Intelligence • Hardware • Machine Learning • Software
The engineer will architect wafer, package, and system level characterization and test strategies for silicon photonics products, and work closely with architecture and design teams, vendors, and validation teams.
Top Skills: AwgDcaDsoLcaPnaPythonSilicon Photonics
Reposted 28 Days AgoSaved
In-Office
Mountain View, CA, USA
165K-245K Annually
Senior level
165K-245K Annually
Senior level
Artificial Intelligence • Hardware • Machine Learning • Software
Develop high-speed analog transceiver solutions while collaborating with architects and engineers for optical communication systems.
Top Skills: 3D Electro-Magnetic Simulation ToolsCadence Design Environment
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