Top Tech Jobs & Startup Jobs

14 Days AgoSaved
In-Office
3 Locations
180K-260K Annually
Senior level
180K-260K Annually
Senior level
Artificial Intelligence • Hardware • Machine Learning • Software
Own end-to-end simulation, co-design, and laboratory verification of photonic-electronic links. Develop multi-physics optical and analog models, perform corner, Monte Carlo, and PVT analyses, create link budgets, and correlate simulations with silicon measurements. Partner with photonic and analog circuit teams on architecture, specifications, interface requirements, and corrective design actions. The role requires high-speed optical lab expertise, silicon photonics experience, and proficiency in photonic, mixed-signal, and Python-based simulation workflows.
Top Skills: Ber Test SetsCadence SpectreCadence VirtuosoCdrCo-Packaged OpticsCtleDfeDspFecFfeKeysight AdsLumerical FdtdLumerical InterconnectNear-Package OpticsNrzOptical I/O ChipletsOptical Modulation AnalyzersOptical Power MetersOptical Spectrum AnalyzersPam-4PdksPhotonic Integrated CircuitsPythonReal-Time OscilloscopesS-ParametersSaxSerdesSilicon PhotonicsVector Network AnalyzersVerilog-AVpi Photonics
15 Days AgoSaved
In-Office
Mountain View, CA, USA
300K-350K Annually
Senior level
300K-350K Annually
Senior level
Artificial Intelligence • Hardware • Machine Learning • Software
Owns major enterprise customer accounts and drives the full sales cycle from engagement through deal closure. Responsibilities include developing account strategies, expanding revenue, building executive and technical relationships, positioning complex photonics and data center solutions, forecasting pipeline, leading negotiations, and coordinating cross-functional teams to deliver customer success.
Top Skills: CpuData Center InfrastructureFpgasGpuHpc NetworkingNetworkingOpticsPhotonicsSemiconductors
Reposted 16 Days AgoSaved
In-Office
Mountain View, CA, USA
135K-212K Annually
Senior level
135K-212K Annually
Senior level
Artificial Intelligence • Hardware • Machine Learning • Software
The Staff Mechanical Engineer will focus on mechanical design, structural analysis, GD&T, and FEA to enhance packaging technologies for AI architectures at Lightmatter.
Top Skills: AbaqusAnsysAutocadFinite Element Analysis (Fea)Geometric Dimensioning And Tolerancing (Gd&T)Mechanical EngineeringSolidworks
Reposted 16 Days AgoSaved
In-Office
Mountain View, CA, USA
187K-220K Annually
Senior level
187K-220K Annually
Senior level
Artificial Intelligence • Hardware • Machine Learning • Software
Lead development of the internal photonics PDK: create Python-based pcells, build and verify compact models for active/passive devices, automate parameter extraction from FDTD/FEM solvers, validate models against lab measurements, implement CI/regression testing, and own netlist extraction and connectivity logic to ensure accurate system-level simulation.
Top Skills: CadenceCi/CdFdtdFemGdsfactoryGitKlayoutLumerical InterconnectNumpyOptocompilerPcellsPdkPhotontorchPytestPythonSaxScipySimphonySynopsys Optsim
Reposted 16 Days AgoSaved
In-Office
Mountain View, CA, USA
220K-270K Annually
Senior level
220K-270K Annually
Senior level
Artificial Intelligence • Hardware • Machine Learning • Software
The Physical Design Timing Engineer will drive backend digital execution, focusing on timing constraints, analysis, and closure on advanced CMOS technologies. Responsibilities include STA sign-off, collaborating with multiple teams, managing timing complexities, and automating timing ECO generation.
Top Skills: CadencePerlPythonShellSynopsysTcl
New

Track Smarter, Apply Better.

Ditch the spreadsheets. Organize your job search with our freeApplication Tracker.

Use For Free
Application Tracker Preview
Reposted 16 Days AgoSaved
In-Office
Boston, MA, USA
179K-219K Annually
Senior level
179K-219K Annually
Senior level
Artificial Intelligence • Hardware • Machine Learning • Software
Lead development of the internal photonics PDK and component library. Build Python-based pcells, create and validate compact models for active and passive devices, automate parameter extraction from electromagnetic solvers, and correlate models with lab measurements. Implement regression testing, CI pipelines, and robust netlist/connectivity logic to ensure layout, models, and simulations remain synchronized.
Top Skills: CadenceCi/CdFdtdFemGdsfactoryGitKlayoutLumerical InterconnectNumpyOptocompilerPhotontorchProcess Design Kit (Pdk)PytestPythonSaxScipySimphonySynopsys Optsim
Reposted 18 Days AgoSaved
In-Office
Mountain View, CA, USA
164K-185K Annually
Senior level
164K-185K Annually
Senior level
Artificial Intelligence • Hardware • Machine Learning • Software
Design and deploy chip, module, and system-level DFT solutions for a photonics-based AI platform. Develop and automate DFT methodologies (ATPG, MBIST, boundary-scan), integrate with RTL and physical design, validate pre-silicon implementations, support post-silicon bring-up and debug, and scale test flows for production.
Top Skills: AteAtpgBoundary ScanEda Dft ToolsJtagMbistPythonTclVerilog
Reposted 18 Days AgoSaved
In-Office
Boston, MA, USA
154K-218K Annually
Senior level
154K-218K Annually
Senior level
Artificial Intelligence • Hardware • Machine Learning • Software
Design, validate, and deploy DFT solutions for digital, analog, and photonic ASICs. Develop scalable automated flows, collaborate with RTL and physical-design teams, implement ATPG/MBIST/boundary-scan strategies, support pre-silicon validation and post-silicon bring-up and debug, and optimize test coverage and integration for production products.
Top Skills: AteAtpgBoundary ScanBscanEda Dft ToolsJtagMbistPhotonic LogicPythonTclVerilog
20 Days AgoSaved
In-Office
Mountain View, CA, USA
157K-176K Annually
Mid level
157K-176K Annually
Mid level
Artificial Intelligence • Hardware • Machine Learning • Software
Design and analyze power delivery networks for high-performance compute SoCs across package and system architectures. Perform electromagnetic, time-domain, and frequency-domain simulations; model regulators; evaluate voltage droop and overshoot; conduct lab measurements; and collaborate with hardware, layout, and systems teams to improve power integrity. Document analyses, support design reviews, monitor layout constraints, and contribute to architectural tradeoff studies.
Top Skills: 2.5D Packaging2D Packaging3D PackagingDc-Dc ConvertersH-SpiceIdemKeysight AdsMatlabN-Port ModelsNetwork AnalyzersOscilloscopesPcb DesignPowerdcPowersiProgrammable LoadsPythonSkillTcl
20 Days AgoSaved
In-Office
Mountain View, CA, USA
157K-176K Annually
Senior level
157K-176K Annually
Senior level
Artificial Intelligence • Hardware • Machine Learning • Software
Drive signal integrity engineering for high-speed photonics and computing products from architecture through lab validation. Analyze PCIe, UCIe, and SerDes channels using S-parameters, eye and jitter analysis, equalization, and simulation tools. Collaborate with hardware and PCB layout teams on impedance, routing, termination, and packaging. Perform measurements with oscilloscopes, VNAs, network analyzers, and TDRs, troubleshoot issues, support design reviews, and document results and guidelines.
Top Skills: Ansys HfssAnsys SiwaveI2CJavaScriptKeysight AdsNetwork AnalyzersOcean ScriptsOscilloscopesPciePythonSerdesSkillSpiTdrsUcieVnas
All Filters
JobType
New Jobs
Job Category
Experience
Industry
Company Name
Company Size

Sign up now Access later

Create Free Account