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The HBM SoC Physical Design Engineer will implement advanced HBM SoC designs, optimize performance and power, and collaborate with various teams to ensure robust physical design integrity.

The role involves leading HBM design projects, influencing next-gen memory architectures, mentoring engineers, and ensuring cross-functional collaboration.

The Thin Films Engineer develops deposition processes for EUV-enabled DRAM, focusing on process optimization and defect reduction while collaborating with multifunctional teams.

Design and optimize next-generation memory products. Responsibilities include circuit design, layout management, verification, and cross-functional collaboration for manufacturability.

Lead failure analysis efforts on returned SSDs, manage RMA cases, conduct electrical diagnostics, generate reports, and mentor junior engineers.

Develop and optimize thin film deposition processes for EUV-enabled DRAM technology, lead process characterization, and collaborate with teams to deliver robust processes.

As a Principal Design Engineer, you'll lead NAND circuit development, focusing on automation, AI-assisted workflows, and circuit verification to enhance design execution and quality across global teams.

Responsible for maintaining and improving equipment performance, conducting preventive maintenance, and troubleshooting issues. Collaborates with manufacturing teams to enhance operations through data analysis and training.

The IT Enterprise Architect will modernize enterprise business platforms using cloud and AI, ensuring secure, scalable solutions. Responsibilities include defining architecture, leading project delivery, integrating systems, and managing risks while collaborating across teams and guiding vendor management.

The FAB Engineer collaborates with operations and development teams to manage NPI projects, improve processes, and analyze data for semiconductor manufacturing, requiring a Master’s degree and 3 years of experience.