Top Tech Jobs & Startup Jobs

Lead photolithography process development for next-generation DRAM, create manufacturing-friendly lithography flows (365/248/193i), collaborate with integration and vendors, innovate layout and lithography techniques, use data analysis/ML for root-cause, and document and present results.

Lead end-to-end DRAM circuit design and optimization across memory array, control logic, datapath, and test logic. Perform SPICE and Verilog simulations, incorporate layout parasitics, evaluate power/performance/area trade-offs, define validation/test-chip strategies, and collaborate with cross-functional teams to enable manufacturable, high-performance DRAM products.

Lead AI and automation strategy and architecture, design end-to-end intelligent workflows and agent-based solutions, establish governance and reusable frameworks, guide platform adoption, and mentor global engineering teams to build secure, scalable enterprise AI solutions.

Lead definition and delivery of an enterprise AI roadmap for construction: prioritize AI use cases (generative design, predictive scheduling, computer vision), drive end-to-end product lifecycle from POC to deployment, partner with IT and stakeholders for secure cloud and data pipelines, measure ROI on schedule/cost/safety, research emerging AI tech, and build/mentor a cross-functional AI product and engineering team to scale AI on global job sites.

Design, optimize, and verify analog and mixed-signal block-level circuits for DRAM. Propose new circuit topologies, expand verification and yield robustness, supervise analog layout and post-layout simulation, support silicon-to-simulation correlation, and collaborate with global teams and EDA/data science partners to leverage AI-assisted design flows.

Lead a team executing wet process, CMP, and wafer bonding development for DRAM. Oversee 24/7 shift operations, wafer movement, data quality, process monitoring, and line recovery. Mentor engineers, improve workflows and AI adoption, and drive cross-functional collaboration to accelerate technology delivery.

Design and validate analog/digital circuits for memory products (HBM/DRAM). Perform schematic entry, layout, parasitic modeling, SPICE simulations, timing/area/power trade-off analysis, and collaborate across product, test, process, and CAD teams to ensure manufacturability and tape-out readiness.

Develop and prepare multi-dimensional semiconductor layouts from schematics, lead major block developments, verify data integrity, debug physical verification issues, mentor juniors, improve automation and layout methodologies, and coordinate with global design, verification, and CAD teams.

Develop and maintain FPGA-based DRAM security test infrastructure and automation to validate mitigations and characterize memory behaviors. Build high-precision FPGA platforms, host software, PCIe integrations, and scalable validation pipelines. Use AI-assisted tools to accelerate development, create test frameworks, analyze large-scale results, and partner with product security and DRAM architects to define threat-informed validation strategies and roadmaps.

Design, optimize, and verify analog and mixed-signal block-level circuits for DRAM. Improve circuit topologies, expand verification for yield, support post-layout simulation and silicon correlation, and apply AI/automation to boost design efficiency.