Top Tech Jobs & Startup Jobs

Lead layout-driven architecture exploration for next-generation memory modules and form factors. Evaluate form factor, routing topology, and pinout tradeoffs; define routing and manufacturing feasibility, SI/PI budgets, and layout constraints for >10-20+ Gb/s signaling. Drive adoption of advanced PCB technologies, collaborate with SI/PI teams, influence industry standards, perform risk/tradeoff analysis, and mentor junior engineers.

Lead daily laboratory and site operations for the San Jose Global Engineering Labs site, partnering with engineering, facilities, EHS, and business teams. Manage space utilization, equipment lifecycle, infrastructure planning, budgets, projects, and continuous improvement initiatives. Build customer relationships, drive safety and operational excellence, coach and develop staff, and use data and AI-enabled tools to improve decision making and service delivery.

Own and optimize process loop performance for semiconductor manufacturing modules. Lead root cause investigations, characterize failure mechanisms, drive yield and structural improvements, support NPI transfers and technology ramps, and deploy monitoring, BKMs, and AI/advanced analytics to accelerate problem solving and manufacturing readiness across global sites.

The role involves defining SoC microarchitecture for AI memory systems, collaborating across teams, and analyzing electrical characteristics. Responsibilities include power delivery, thermal analysis, and documentation.

Provide system administration for server platforms and virtualization: monitor performance, manage incidents/changes, perform capacity planning, patching, and lifecycle activities. Coordinate with teams/vendors, participate in on-call and emergency response, and develop automation and AI-assisted tooling to improve operational efficiency and reduce incidents.

Own development, optimization, and sustainment of ion implantation processes for high-volume semiconductor manufacturing. Drive yield and defect improvements using SPC and data analysis, lead process change reviews and qualifications, collaborate with equipment/integration teams and vendors, and accelerate learning via inline metrology and data-driven monitoring.

The Senior Package Design Engineer will design and optimize semiconductor packages, collaborating with cross-functional teams to enhance performance and manufacturability, while leading layout activities and contributing to standards and guidelines.

The position involves supporting BEOL process flow development for DRAM technologies, troubleshooting integration issues, analyzing data for yield improvement, collaborating with teams, and learning statistical tools.

Lead sourcing and evaluation of Seed to Series B venture investments, drive company-wide AI/ML initiatives, manage portfolio relationships, prepare executive briefings, and mentor team members while partnering cross-functionally to align investments with Micron's strategy.

Lead development, installation, qualification, and optimization of photolithography track equipment and recipes. Investigate process excursions, fix defects and uniformity issues, coordinate suppliers and cross-functional teams, and drive solutions to improve yield, cost, and throughput for high-volume semiconductor manufacturing.