Top Tech Jobs & Startup Jobs

As a Pathfinding Device Integration Engineer, you'll develop next-gen memory technologies, guiding innovation, conducting experiments, and collaborating on design trade-offs.

The Semiconductor Process Engineer will enhance NAND cell technology by analyzing device specs, collaborating on process definition, and optimizing performance through modeling and simulation.

This role involves data analysis, developing applications for production metrics, leading projects, mentoring, and improving processes using engineering concepts.

The Partner Lab Support Engineer provides onsite support for validation and qualification efforts, implementing test plans and solving issues to ensure product success and customer trust.

The Staff ASIC Verification Engineer will develop innovative verification environments for complex SoCs and work collaboratively with architecture and design teams to resolve issues.

Lead front-end planning and governance for large semiconductor new-build capital programs. Define delivery frameworks, translate business needs into facility and infrastructure requirements, establish baselines for schedule and cost, align cross-functional stakeholders, mitigate early risks, and drive scalable construction strategies including prefabrication and AI-enabled reporting.

Ensure validation, product development, and process learnings are propagated across DRAM technologies. Collaborate with DRAM technology pillars to prioritize cross-portfolio lesson sharing, drive data collection and analysis for Best-Known Method coverage, consolidate and document alignment activities, and work with manufacturing DFT/Test Development and Silicon Strategy teams to implement cross-technology and design-based alignment.

Provide Linux server support and technical leadership for engineering design teams. Automate provisioning and configuration (Puppet, Kickstart), onboard and optimize AI/HPC workloads, manage virtualization, troubleshoot performance and reliability issues, and drive continuous improvement of the Linux compute environment.

Lead a portfolio of AI initiatives for construction from concept to adoption. Partner with construction, engineering, operations, and tech teams to define use cases, manage roadmaps, budgets, governance, risk, and success metrics, and drive pilots, training, and responsible AI practices to improve safety, quality, cost, and schedule.

Technical leader for photolithography Track & Trim equipment development. Lead equipment selection, installation, qualification, and deployment (including EUV), drive uptime/reliability improvements, embed safety practices, and partner with process, manufacturing, and vendors to scale solutions across global fabs.