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Lead definition, design, simulation, layout, and testing of photonic integrated circuits on a heterogeneous silicon–III/V platform. Map customer requirements to the platform, coordinate packaging and fabrication, define test plans, analyze data, and prioritize PDK components to deliver market-ready PIC products.

Lead end-to-end supplier relationships across wafer, epitaxial, backend, and PCB suppliers. Manage POs, lead times, forecasts, capacity, risk mitigation, supplier negotiations, QBRs, supplier qualifications, inventory data, and support engineering for R&D and production ramps.

Perform hands-on lab characterization and high-speed optical testing of photonic components and PICs, build and automate test stations, develop/debug firmware and test code, analyze data and communicate results, support customer integration and demos at events, and generate customer-facing documentation.

Create and maintain photonic device and PIC layouts using commercial and custom tools; implement photonic design automation workflows; perform physical verification and mask build automation to produce GDS artwork; collaborate with process engineers and PDK developers to ensure manufacturability and drive quality improvements.

Design, implement, and execute wafer‑level test solutions for silicon photonics and PICs on automated wafer probers. Develop custom test hardware, specify PCBAs and probe cards, calibrate optical/RF probe cards, write and review test algorithms and automation (C++/Java/Python), optimize throughput, analyze results, and manage supplier and production handoff.

Design, simulate, and validate passive silicon and silicon nitride photonic components (couplers, grating couplers, spot size converters). Create datasheets and CAD layouts, develop compact PDK models, and collaborate with process, layout, test, PIC architects, and system teams to define, fabricate, and verify device performance.

Design, support, and qualify photonic integrated circuits (PICs) across prototype and development stages. Perform layout reviews, test planning, device and system-level data analysis, characterization, and statistical evaluation. Drive debugging, root-cause analysis, performance optimization, and collaborate with test, system, operations, and reliability teams to ensure product release and yield improvement.

Manage end-to-end heterogeneous Si–III‑V photonic wafer fabrication with external foundries: create fabrication plans, lead process reviews, monitor lots, drive yield improvement through SPC/PCM, oversee wafer bonding and failure analysis, implement control plans, and contribute to PDK and new process module development.

Design and implement custom hardware and automated test software to validate silicon photonics devices and PICs at wafer, die, and package levels. Execute 100–400 Gb/s eye and S-parameter testing using BERTs, DCAs, VNAs, and AWGs; analyze and fit data in Python or JMP; measure laser RIN; supervise equipment maintenance; and report results to stakeholders.

Design, simulate, and integrate semiconductor optical amplifiers and other III-V optoelectronic devices into a heterogeneous silicon photonics platform. Define CAD layouts, develop compact PDK models, collaborate with process, layout, test, reliability, and PIC teams, and lead device characterization, validation, and failure analysis to meet performance and qualification targets.