Top Tech Jobs & Startup Jobs

Implement, optimize, and validate high-performance machine learning and linear algebra kernels for the Cerebras Wafer-Scale Engine. Develop low-level kernel routines using the Cerebras Software Language and C++, apply parallel programming techniques, profile and tune performance, debug correctness and hardware utilization issues, build tests and validation, and collaborate with compiler, performance, and hardware engineers.

Lead administration and support for NetSuite and adjacent enterprise systems. Manage user access, troubleshoot production issues, monitor integrations, perform configuration and minor enhancements, support financial and supply chain cycles, own release and change management, drive automation and process improvement, support audits and SOX controls, and partner with business stakeholders for UAT, training, and governance.

Build and improve C++ simulator infrastructure for Cerebras Wafer-Scale Engine, covering functional and pipeline-accurate simulation. Develop tooling, tests, and performance improvements; collaborate with architecture, design verification, compiler/runtime teams; debug cross-domain issues and maintain test/regression coverage and documentation.

Early-career SDET on Release Integration Testing for Cerebras AI Inference Core. Write automation and tests across the AI stack, triage cross-stack failures, maintain branch stability, collect qualification evidence, and collaborate with feature and infra teams to prepare features for production release.

Design and validate electrical infrastructure for high-density AI data center deployments: develop BoD, one-line diagrams, load and protection studies, review vendor submittals, coordinate multidisciplinary teams, support commissioning, and ensure compliance with NEC, NFPA, IEEE and regional codes.

Lead synthesis, placement, routing, and full-chip physical design for high-speed AI silicon. Perform block and full-chip physical verification, timing closure, power/performance/area optimization, DRC/LVS and IR/EM resolution, STA and constraint drafting, floorplanning, and script-based flow enhancements. Collaborate with RTL teams to integrate blocks into the full-chip architecture.

Develop, implement, and sustain manufacturing test automation from PCBA to system level. Build GUIs and web interfaces, work with contract manufacturers to deploy test infrastructure, reporting portals, and traceability. Troubleshoot test software and hardware defects and support manufacturing site setups.

Design and implement embedded and system-level software for the Wafer Scale Engine, including Linux BSP, administrative services, hardware monitoring, debugging, and cross-team collaboration to improve reliability, observability, and operability at datacenter scale.

Build and productionize a GPU-accelerated prefill serving path for LLM inference: deploy, operate, and optimize model-serving, runtime (vLLM/PyTorch/ROCm), multi-node GPU infrastructure, reliability, performance, correctness, and benchmarking.

Design and architect front-end datacenter and interconnect fabrics for AI/HPC clusters, prototype and productionize new network designs, automate deployment and validation (Python/Ansible), operate SRE-grade telemetry and observability (gNMI, Prometheus, Grafana), debug host-NIC-fabric performance (RoCEv2, PFC/DCQCN, ECMP), lead multi-team projects, and collaborate with vendors and standards bodies to ensure network reliability.