Top Tech Jobs & Startup Jobs

Own dense, high-layer-count PCB layout from schematic handoff through fabrication release. Develop stackups, HDI structures, controlled-impedance routing, differential pairs, BGA breakouts, libraries, design rules, and manufacturing documentation. Translate SI/PI constraints into layout rules, conduct DFM/DFA/DFT reviews, manage revisions, and coordinate with fabricators and assembly houses. The role requires expert Cadence Allegro or equivalent Altium experience, production-proven high-speed board design, IPC knowledge, and advanced HDI and fine-pitch package expertise.

Own signal and power integrity for high-speed boards and packages. Perform pre- and post-layout channel analysis, SI/PI modeling, via and connector optimization, PDN design, and chip-package-board co-simulation. Correlate simulations with VNA, TDR, and oscilloscope measurements, evaluate materials and fabrication tolerances, and establish reusable methodologies, model libraries, and design guidelines for reliable high-speed hardware.

Designs and develops board-level analog and mixed-signal circuits for optical computing systems, including photodetector front ends, converters, laser and modulator drivers, power delivery, control loops, and precision references. Responsibilities span architecture, simulation, PCB layout guidance, component qualification, laboratory bring-up, characterization, production release, and collaboration with photonics and ASIC teams.

Lead end-to-end analog and mixed-signal ASIC design for a photonic AI accelerator: architect circuits (TIA, VGA, ADC/DAC, PLLs, LDOs), drive full-custom flow and tapeout sign-off, run silicon bring-up and characterization, define design methodologies, and mentor junior designers while collaborating with photonics, digital, firmware, and foundry partners.

Build and own Python-based performance and power modelling frameworks for photonic AI hardware. Model concurrency, event-driven behavior, compute, memory, interconnects, and accelerator blocks; characterize AI workloads against hardware and RTL results; consume MLIR and compiler outputs; analyze simulation traces and benchmarks; validate power models; maintain CI/CD and simulation flows; and guide architecture and compiler decisions while developing future team members.

Develop and maintain low-level firmware, drivers, and RTOS-based control software for an AI accelerator. Perform BSP bring-up, bootloader configuration, hardware debugging (JTAG/GDB/oscilloscope), write firmware tests and CI, and document interfaces while collaborating with senior engineers and hardware teams.

Design and maintain firmware, drivers, and RTOS-based control software for an AI accelerator. Lead BSP bring-up, implement deterministic RTOS tasks, debug hardware with JTAG/oscilloscope/logic capture, and establish coding standards and testing practices.

Own technical customer engagements for Lumai's optical compute inference platform: lead deep technical discovery, scope and run benchmarks, design solutions and reference architectures, produce proposals/RFIs/RFPs, deliver demos/workshops, and feed customer requirements into product and engineering roadmaps.