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Develop and maintain a high-performance host-side driver stack implementing industry-standard graphics and compute APIs (Vulkan, OpenGL, OpenCL, SYCL) on top of a proprietary RISC-V GPU API. Contribute to open-source projects like Mesa, run Khronos CTS conformance tests, participate in standards groups, coordinate with GPU driver team, and build toolchains for development, optimization, and debugging.

Lead the architecture definition for advanced semiconductor products, focusing on SoC design, performance modeling, and cross-functional collaboration in a tech lead role.

Lead design and implementation of a high-performance host-side driver stack mapping industry-standard graphics and compute APIs (Vulkan, OpenGL, OpenCL, SYCL) onto a proprietary RISC-V GPU API. Contribute to open-source (Mesa), run Khronos conformance tests, participate in standards groups, coordinate with GPU driver team, and build tooling for development, optimization, and debugging.

The RTL Design / Microarchitecture Engineer will define and implement microarchitectural components, optimize performance, and collaborate with cross-functional teams.

As a Principal Design Verification Engineer, you will lead verification strategies and teams for complex IPs or full-chip SoCs, ensuring high-quality silicon delivery through comprehensive verification methodologies and cross-functional collaboration.

Responsible for full-chip or block-level physical design from netlist to GDSII, ensuring timing, power, and area targets are met. Collaborates with teams for design convergence and performs DRC/LVS/EM/IR debugging.

Coordinate customer and partner onboarding, manage executive support and calendars, track sales pipeline and KPIs, maintain BD documentation, coordinate cross-functional projects, organize travel, support recruiting, and build scalable onboarding and enablement processes to grow business development operations.

The Site Reliability Engineer will design, implement, and manage reliable infrastructure and services, ensuring operational excellence and uptime.

The Senior Design Verification Engineer develops and verifies silicon IP, optimizing and characterizing performance using advanced tools, while leading a team.