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4 Days AgoSaved
In-Office
2 Locations
160K-210K Annually
Senior level
160K-210K Annually
Senior level
Hardware • Manufacturing
Develop firmware and applications for energy-efficient processors across simulation, RTL emulation, and silicon. Maintain low-level SDKs, port RTOSes, validate and verify silicon, develop bring-up hardware and customer evaluation kits, perform board and first-silicon bring-up, debug hardware issues with design teams, and support customers with board development.
Top Skills: Ambiq ApolloBare-Metal SdkCC++Embedded SystemsMsp430Pcb DesignPic32Rtl EmulationRtosStm32
4 Days AgoSaved
In-Office
3 Locations
160K-210K Annually
Senior level
160K-210K Annually
Senior level
Hardware • Manufacturing
Drive functional verification of complex ASIC, SoC, and IP designs from specification through tapeout. Build UVM and constrained-random testbenches, achieve functional and code coverage closure, debug simulation failures, and develop Python-based automation and regression flows. Collaborate with software and technical leadership to communicate verification risks and status. Preferred experience includes formal verification, AI-assisted verification, pre-silicon software testing, post-silicon validation, SoC architecture, and power-aware verification.
Top Skills: Amba AceAmba AxiAmba ChiArmAsicCC++JaspergoldPythonRisc-VSocSystemverilogUpfUvm
Reposted 8 Days AgoSaved
In-Office
3 Locations
160K-210K Annually
Senior level
160K-210K Annually
Senior level
Hardware • Manufacturing
The Senior Product Manager - Software defines the roadmap for Efficient Computer's developer platform, focusing on SDKs, compilers, and ensuring robust developer experiences while driving strategy and metrics for product success.
Top Skills: CompilerExecutorchLitertOnnxPyTorchRuntimeSdkTensorflow LiteTensorrt
9 Days AgoSaved
In-Office
3 Locations
160K-210K Annually
Senior level
160K-210K Annually
Senior level
Hardware • Manufacturing
Serve as the technical bridge between customers and engineering teams during silicon IP evaluation and SoC integration. Responsibilities include verification environment setup, RTL and integration debugging, synthesis, physical implementation, timing closure, signoff, training, pre-sales evaluations, customer reviews, release validation, and creating reusable enablement resources. The role requires broad ASIC/SoC expertise, scripting, IP integration experience, and customer-facing communication, with approximately 20–30% travel.
Top Skills: Cadence InnovusCcsDrc/LvsEcsmFusion CompilerIr/EmLefLibertyMakePrimetimePythonQuestaRtlSdcShellStaSynopsys Icc2SystemverilogTclTempusUpfUvmVcsXcelium
Reposted 13 Days AgoSaved
In-Office
San Jose, CA, USA
150K-190K Annually
Senior level
150K-190K Annually
Senior level
Hardware • Manufacturing
Lead test engineering across chip programs including DFT strategy, ATPG and STIL pattern generation, ATE test program development (Advantest/Teradyne), first-silicon bringup, wafer probe and final test coordination with OSATs, yield analysis, load board bring-up, and building scalable test infrastructure for production.
Top Skills: AdvantestAteAtpgDftDft Entry FlowsFinal TestJtagLoad Board BringupMbistPdlPower Rail SequencingScan InsertionStilTeradyneWafer Probe
Reposted 24 Days AgoSaved
In-Office
3 Locations
200K-250K Annually
Senior level
200K-250K Annually
Senior level
Hardware • Manufacturing
The Lead STA Engineer will develop timing flows and methodologies for advanced processor technologies, ensuring timing convergence and contributing to the design and production process.
Top Skills: Cadence TempusHspicePythonShellSynopsys PrimetimeTcl
One Month AgoSaved
In-Office or Remote
8 Locations
160K-210K Annually
Senior level
160K-210K Annually
Senior level
Hardware • Manufacturing
Design and implement compiler features and toolchains to compile ML models to a custom energy-efficient processor. Improve performance, debug compiler issues, write tests, work with ML frameworks, and collaborate with hardware and application teams to optimize compilation, placement, and runtime for TinyML applications.
Top Skills: Ai/Ml FrameworksC++Dataflow IsaFpgaGccGdbLlvmMlirPlace-And-RoutePnrSystemverilogTinymlVerilogVhdl
Reposted One Month AgoSaved
In-Office
3 Locations
160K-210K Annually
Mid level
160K-210K Annually
Mid level
Hardware • Manufacturing
Work with customers to design, implement, and optimize board-level and embedded solutions using Efficient's low-power architecture. Develop firmware and software across the embedded stack, build reference designs and demos, support customers through development to deployment, and provide field feedback to internal teams. Travel to customer sites and events as needed to enable integrations and ensure successful product adoption.
Top Skills: Ai/Ml FrameworksBoard DesignEmbedded PlatformsEmbedded SystemsFirmware
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