Top Tech Jobs & Startup Jobs

Design, develop, customize, and support Infor LN CloudSuite solutions; build integrations via ION/ION Connectors; develop with LN Studio/Baan 4GL/DAL; perform debugging, performance tuning, bshell/CGP analysis, support upgrades and production, and collaborate with functional teams.

Design, build, and maintain end-to-end MLOps pipelines on Databricks/AWS including data prep, feature engineering, model training, deployment, monitoring, CI/CD, infrastructure as code, governance, and automated retraining to ensure scalable, secure, and reliable ML production systems.

Lead design, build, and deploy enterprise-grade generative and agentic AI architectures, production-ready multi-agent systems, LLM-powered chatbots, and reusable AI platform services. Establish governance, guardrails, standards, and integrations for scalable, secure AI adoption across business domains.

Perform hands-on functional, end-to-end, and regression testing of TSYS-related enhancements, integrations, and defect fixes for card and payment workflows. Validate transaction lifecycle scenarios (authorizations, clearing, settlement, postings, fees, disputes, chargebacks, reconciliation), document results, log defects, and collaborate with business and technology stakeholders to ensure acceptance criteria are met.

Lead design, development, and deployment of enterprise-scale Generative and Agentic AI solutions. Architect production-ready multi-agent systems, LLM-powered chatbots, and scalable AI platforms. Define standards, governance, guardrails, and best practices; integrate AI with enterprise systems and implement prompt engineering and RAG strategies to improve conversational and automation workflows.

Design, build, and maintain end-to-end MLOps pipelines on Databricks/AWS: data prep, feature engineering, training, deployment, monitoring, CI/CD, Terraform infra, governance with Unity Catalog, model serving with MLflow/Databricks, performance/cost optimization, troubleshooting, and documenting operational best practices.

Owner of micro-architecture and RTL lifecycle for complex digital blocks. Implement RTL in SystemVerilog/Verilog, drive control logic and IP integration, support sign-off (CDC, RDC, lint, synthesis), collaborate with DV teams for closure and debug, and take full project ownership with minimal supervision.

Lead RTL design and micro-architecture for complex digital blocks using SystemVerilog/Verilog. Implement control logic, integrate IPs, support SoC integration, and drive sign-off activities (CDC/RDC/lint/synthesis). Collaborate with DV teams for closure and debug and own the full project lifecycle with minimal supervision.

Remote 12-month contract RTL Design Engineer to own micro-architecture and RTL implementation for complex digital blocks. Requires SystemVerilog/Verilog expertise, memory controller and SoC integration experience, IP integration, multi-clock-domain design, and sign-off familiarity (CDC/RDC/lint/synthesis). Works independently and collaborates with DV for closure and debug.

Lead design, architecture, implementation, and troubleshooting of 4G/5G mobility solutions. Provide 2nd-level support, perform call flow and KPI analysis, apply best practices for monitoring/documentation, and support a mission-critical 24/7 environment.