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In-Office
Raleigh, NC, USA
Senior level
Senior level
Hardware
Leads global package architecture, design, development, qualification, and manufacturing ramp for GaN and SiC semiconductor products. Owns package technology roadmaps, engineering teams, simulation, materials, assembly processes, reliability, supplier and OSAT execution, and manufacturing readiness. Drives cross-functional development, technical risk mitigation, qualification, root-cause resolution, platform reuse, and customer engagement while balancing performance, quality, cost, and schedule.
Top Skills: Aec-QAnsysCpkDfmeaDoeFinite-Element AnalysisGanJedecOsatSicSolidworksSpc
2 Days AgoSaved
In-Office
Raleigh, NC, USA
Senior level
Senior level
Hardware
Leads the SiC and GaN product engineering organization and owns product lifecycle execution from device development through qualification, production release, high-volume manufacturing, and field deployment. Oversees testing, characterization, reliability, yield improvement, defect screening, quality, documentation, customer escalations, and technical support. Builds and mentors multidisciplinary engineering teams while collaborating with foundries, OSATs, operations, quality, technology, and customer-facing teams.
Top Skills: Aec-Q101Cp TestingDiodesDpatFt TestingGallium Nitride (Gan)Gan HemtsGdbnJedecJfetsMosfetsOsatPower ModulesPower SemiconductorsQc TestingSblSilicon Carbide (Sic)Syl
5 Days AgoSaved
In-Office
90503, Torrance, CA, USA
170K-190K Annually
Senior level
170K-190K Annually
Senior level
Hardware
Design and verify digital ASIC blocks for PMICs, covering RTL, simulation, formal verification, mixed-signal co-simulation, synthesis, timing analysis, and tape-out. Develop FPGA prototypes for post-silicon validation, debug fabricated silicon, automate workflows, and collaborate with analog, layout, test, and validation teams. Lead architecture, verification reviews, methodology improvements, and multiple projects while mentoring junior engineers.
Top Skills: Ams Co-SimulationAsicAtpgBashCadence ConformalCadence GenusCadence InnovusCadence ModusCadence TempusCadence VoltusCadence XceliumDftFpgaGitI2CLinuxMakePmbusPythonReal-Number ModelingSdcSmbusSpiSvaSystemverilogTclUvmVerilogXilinx IseXilinx Vivado
5 Days AgoSaved
In-Office
90503, Torrance, CA, USA
145K-185K Annually
Senior level
145K-185K Annually
Senior level
Hardware
Owns system-level performance of integrated voltage regulators from laboratory testing through customer board evaluation. Responsibilities include designing evaluation platforms and reference boards, validating power delivery, analyzing control-loop stability and power integrity, correlating simulations with measurements, developing automation and documentation, and supporting customer design-ins and bring-up. The role collaborates with semiconductor, packaging, PCB, thermal, sales, and customer teams to guide IVR product definition and roadmap development.
Top Skills: Ansys IcepakAnsys Q3DAnsys SiwaveAvsbusCadence CelsiusCadence SigrityComsolEmbedded Power DeliveryGanGitI2CI3CKeysight AdsLtspiceMultiphase Buck RegulatorsPdn AnalysisPlecsPmbusPower IntegrityPythonSicSimcenter FlothermSimetrixSimplisSynchronous Buck RegulatorsVertical Power Delivery
5 Days AgoSaved
In-Office
90503, Torrance, CA, USA
145K-185K Annually
Senior level
145K-185K Annually
Senior level
Hardware
Owns integrated voltage regulator characterization from first silicon through production release. Responsibilities include developing automated low-voltage, high-current test benches, measuring electrical and thermal performance, establishing calibration and data-quality practices, authoring datasheets, correlating bench results with ATE, defining production trim and limits, and supporting qualification, reliability, yield improvement, and failure analysis. Requires strong power electronics knowledge, Python automation, statistical analysis, semiconductor production-test experience, and cross-functional collaboration.
Top Skills: Ansys IcepakAnsys Q3DAnsys SiwaveAteCadence CelsiusCadence SigrityComsolFinal TestGanGitI2CI3CJmpKeysight AdsLtspicePlecsPmbusPythonSicSimcenter FlothermSimetrixSimplisSmbusWafer Sort
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20 Days AgoSaved
In-Office or Remote
90503, Torrance, CA, USA
200K-250K Annually
Expert/Leader
200K-250K Annually
Expert/Leader
Hardware
Leads ultra-high-voltage SiC device and process technology from architecture and simulation through fabrication, characterization, reliability qualification, and foundry transfer. Serves as technical lead and principal investigator for U.S. government-funded programs, manages milestones and deliverables, develops patents, supports customers, and mentors engineers across global sites. Focus areas include 3.3 kV–10 kV+ MOSFETs, diodes, JFETs, bipolar devices, process integration, TCAD, and high-voltage reliability testing.
Top Skills: Avalanche TestingBipolar DevicesEarEdge TerminationEtchingGallium Nitride (Gan)HtgbHtrbIgbtsImplantationItarJfetsMosfetsOhmic ContactsOxidationPassivationPin DiodesShort-Circuit TestingSic Integrated CircuitsSilicon Carbide (Sic)Tcad
23 Days AgoSaved
In-Office
90503, Torrance, CA, USA
110K-160K Annually
Senior level
110K-160K Annually
Senior level
Hardware
Lead product engineering for GaN power semiconductor devices from silicon evaluation and NPI through qualification, production ramp, and sustaining engineering. Own characterization, CP/FT test strategy, yield improvement, datasheet validation, reliability assessment, and qualification readiness. Analyze device physics, manufacturing variation, and power switching behavior while coordinating cross-functional investigations with device, process, reliability, quality, test, applications, wafer fab, and OSAT teams.
Top Skills: DoeDouble-Pulse TestingDynamic Rds(On)Electrical CharacterizationFinal Test (Ft)Gan HemtsJmpMinitabOsatPower ElectronicsPythonSemiconductor DevicesSemiconductor Reliability TestingSic MosfetsStatistical Process ControlWafer FabricationWafer Probe (Cp)
One Month AgoSaved
In-Office
92612, Irvine, CA, USA
100K-110K Annually
Senior level
100K-110K Annually
Senior level
Hardware
Lead end-to-end new product introduction programs for GaN and SiC semiconductor products from concept through qualification, commercial launch, and production handoff. Manage gate reviews, schedules, risks, suppliers, foundry and OSAT coordination, cross-functional execution, executive reporting, and NPI process improvements. Directly manage and mentor junior program managers and interns while using Microsoft 365, AI productivity tools, and dashboards to track program health and launch readiness.
Top Skills: Aec-Q100Aec-Q101Agile PlmAgile/ScrumAsanaClaudeFmeaGanJedecJIRAMicrosoft CopilotExcelMicrosoft OutlookMicrosoft PlannerMicrosoft PowerpointMicrosoft ProjectMicrosoft SharepointMicrosoft TeamsMicrosoft WordOraclePower BIPower QueryPpapSAPSilicon Carbide (Sic)SmartsheetWide Bandgap (Wbg)
One Month AgoSaved
In-Office
92612, Irvine, CA, USA
80K-90K Annually
Entry level
80K-90K Annually
Entry level
Hardware
Supports and progressively owns new product introduction programs for GaN and SiC power semiconductor products from kickoff through qualification, release, and production handoff. Maintains schedules, milestones, risks, action items, gate reviews, status dashboards, and cross-functional deliverables. Coordinates engineering, quality, operations, supply chain, suppliers, and foundries while tracking qualification activities and escalating delays. Contributes to process improvements and uses Microsoft 365 and AI productivity tools for documentation and reporting.
Top Skills: Aec-Q100Aec-Q101AsanaClaudeGanJedecJIRAMicrosoft 365Microsoft CopilotExcelMicrosoft OutlookMicrosoft PlannerMicrosoft PowerpointMicrosoft ProjectMicrosoft TeamsMicrosoft WordPower BISilicon Carbide (Sic)Smartsheet
One Month AgoSaved
In-Office
92612, Irvine, CA, USA
210K-285K Annually
Senior level
210K-285K Annually
Senior level
Hardware
Leads flagship GaN and SiC semiconductor new product introduction programs from concept through qualification, launch, and production ramp. Builds and manages the NPI program organization, establishes governance and gate criteria, drives cross-functional execution, manages portfolio risks, and oversees capacity planning, manufacturing readiness, yield improvement, product cost, and gross margin initiatives. Presents program status to executive, customer, and board-level stakeholders while improving NPI processes, analytics, and organizational capabilities.
Top Skills: Aec-Q100Aec-Q101Agile PlmClaudeFmeaGallium Nitride (Gan)JedecLeanMicrosoft CopilotExcelMicrosoft PlannerMicrosoft PowerpointMicrosoft ProjectMicrosoft SharepointMicrosoft TeamsOraclePower BIPpapSAPSilicon Carbide (Sic)Six Sigma
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