Top Tech Jobs & Startup Jobs

Partners with finance and business leaders on budgeting, forecasting, close, variance analysis, P&L management, expense control, and resource allocation. Builds cost models, supports BOM and NPI estimates, develops scenario analyses, and delivers leadership-ready reporting. The role also improves reporting automation, standardizes processes, and translates complex financial data into actionable recommendations across Finance, Engineering, Operations, HR, Procurement, and IT.

Build and scale SiTime’s corporate communications programs across customer and partner storytelling, media relations, industry events, employee communications, and social amplification. Develop relationships with journalists, secure coverage and speaking opportunities, translate complex semiconductor technology into compelling narratives, and create measurable, repeatable workflows. Partner cross-functionally with Sales, Marketing, Product, Business Development, and Human Resources while managing stakeholders, deadlines, and sensitive information with limited oversight.

The Time Synchronization System Architect will develop technical relationships with key customers, drive architectural discussions, influence SiTime's roadmap, and advocate technical expertise for design wins in data centers and networking markets.

Leads electrical and physical failure analysis for semiconductor ICs, from fault isolation through root-cause determination. Investigates customer returns, qualification and reliability failures, and new product issues using advanced analytical tools. Collaborates with design, test, product, system, reliability, manufacturing, and customer engineering teams to drive corrective actions and improve product quality. Produces technical reports and leadership updates while strengthening failure-analysis practices and efficiency.

Leads custom analog and full-custom digital layout design for CMOS and BiCMOS circuits at chip, block, and cell levels. Responsibilities include floorplanning, routing, power distribution, shielding, device matching, DRC/LVS/ERC verification, chip integration, and tape-out. The role coordinates offshore designers, mentors junior engineers, develops layout methodologies, improves workflows, and resolves parasitic, signal integrity, electromigration, and power distribution challenges.

Leads the general ledger accounting function for a growing public company, overseeing monthly, quarterly, and annual close processes, journal entries, reconciliations, technical accounting, U.S. GAAP compliance, SOX controls, audits, and financial reporting. Manages AP, AR, and fixed-assets teams, remediates control deficiencies, and develops scalable accounting processes through automation and AI. Partners cross-functionally to improve accuracy, efficiency, and timely financial close.

Leads manufacturing finance for Operations and Supply Chain, including budgeting, forecasting, standard costing, inventory accounting, gross margin analysis, variance reporting, capital spending, controls, and audit readiness. Partners cross-functionally to connect operational performance with financial outcomes, improve processes and analytics, and develop finance team capabilities in a global semiconductor manufacturing environment.

Leads end-to-end product engineering for mixed-signal semiconductor timing products, from conception and NPI through qualification, manufacturing release, yield improvement, and end-of-life. Defines ATE test and manufacturing strategies, manages BOMs, supplier and customer excursions, and drives root-cause analysis, statistical yield optimization, product quality, and compliance. Partners with design, test, quality, operations, suppliers, and customers while mentoring engineers and influencing technical decisions.

Provides lifecycle support for semiconductor CAD and EDA environments across analog, digital, and mixed-signal CMOS design. Responsibilities include PDK management, tapeout flows, schematic and layout tools, simulation and verification environments, CAD automation, Linux support, tool evaluation, regression testing, documentation, user training, and EDA vendor coordination.

Designs, develops, qualifies, and releases custom semiconductor packaging technologies for MEMS-based timing products. Leads package design, development, production ramp, design-of-experiments, OSAT management, prototyping, testing, troubleshooting, and performance, reliability, and quality validation. The role works with leadframe, flip-chip, bumping, substrate-based, ceramic, wafer-level, and multi-chip packages while evaluating thermal, mechanical, electrical, stress, and material characteristics.