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The DFT Engineer will define and implement DFT methodologies for complex digital chips, debug DFT features, and validate silicon tests.

Lead RTL design verification efforts, manage test bench architecture, and mentor team members. Requires extensive experience in VLSI verification and digital design blocks.

The role involves developing verification strategies for mixed-signal designs, creating behavioral models, and debugging testbenches using UVM and SystemVerilog for high-speed communication technology.

Responsible for end-to-end verification of RTL designs, leading test bench architecture, mentoring engineers, and ensuring full functionality through detailed coverage analysis.

Lead and manage a team of verification engineers, define verification strategies, oversee development of environments, and foster technical excellence.

Develop verification strategies for mixed-signal designs, create behavioral models, write and debug testbenches, and run simulations to ensure model accuracy.

The Engineering Site Manager will establish and lead the Austin engineering site, overseeing operations, mentoring teams, and driving technical execution in collaboration with global teams.

The Analog Design Engineer will develop high-end ADC/DAC systems for optical communication, focusing on design and verification of complex analog circuits in advanced processes.

Develop and maintain a Linux-based chip management application, implement testing frameworks, optimize processes, and collaborate with international teams in embedded software engineering.

The Senior Embedded SW Engineer will lead DSP firmware development, provide technical guidance, and collaborate with cross-functional teams to drive project success.