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The Senior Test Development Engineer designs and implements automated production tests for fiberoptics lasers, collaborates with engineering teams, and manages test stations for efficiency and performance.

The Senior Cost Accountant manages the cost accounting system, prepares financial statements, reconciles accounts, and analyzes inventory and production costs in a manufacturing environment.

Lead design and development of system protection test solutions across NPI lifecycle: hardware/software test development, ATE to bench correlation, robustness and reliability testing, production test transfer, and support for REL and OSAT test transitions.

The Director leads global cost accounting strategies, ensuring compliance and accuracy across financial data, while managing a team and supporting business decisions.

The Senior Technical Program Manager drives execution across complex programs, coordinating with multiple departments and ensuring timely delivery and risk management.

The MOCVD Engineer oversees daily operations of MOCVD processes, equipment maintenance, quality control, failure analysis, and yield improvement initiatives. Collaboration with R&D and production teams is key.

The Senior Product Manager will drive strategy, roadmap, and execution for AirLink's software platform and value-added services, managing the product lifecycle and partnerships while ensuring technical and commercial goals are met.

The Sr. Verification Engineer develops verification plans for mixed-signal ICs, mentors junior engineers, and collaborates with various teams. Responsibilities include creating test strategies, implementing testbenches, and supporting silicon validation.

The Reliability Engineering Manager will lead reliability engineering for photonic semiconductor operations, ensuring product performance and reliability, conducting testing, and overseeing failure analysis. They will interface with customers and develop data-driven reports to guide decision-making.

The Senior Analog Design Engineer designs and validates analog functions like ADCs, engages in chip definition, and oversees layout and test methodologies.