Top Tech Jobs & Startup Jobs

Own end-to-end physical design for advanced SoCs, from RTL through GDSII and silicon delivery. Lead floorplanning, synthesis, place and route, CTS, routing, timing, power, physical verification, and signoff while meeting PPA targets. Drive methodology, automation, advanced-node implementation, team mentoring, cross-functional collaboration, EDA vendor engagement, post-silicon bring-up, yield improvement, and production ramp activities.

Architect and develop system management firmware for NXP i.MX SoCs and development boards. Port firmware to new hardware, integrate it across bootloader, trusted firmware, Linux, and MCU SDK components, and develop tests for coverage and performance. Collaborate with architecture, BSP, and support teams to debug and optimize customer systems. Produce documentation and support materials.

Leads STA and physical design timing closure for complex AI, edge, and automotive processor SoCs. Manages engineers, develops and verifies timing constraints, drives subsystem and full-chip closure, improves timing methodologies, and coordinates with architecture, RTL, DV, DFT, EDA, and global design teams. Requires expertise in advanced timing analysis, crosstalk, noise, OCV, clock behavior, jitter, IR drop, and SPICE analysis, along with technical leadership across multi-site teams.

Leads end-to-end SoC physical design from RTL through tapeout, including floorplanning, synthesis, place and route, timing, power, physical verification, and signoff. Manages global teams, execution schedules, cross-functional alignment, EDA vendor relationships, methodology improvements, advanced-node implementation, and post-silicon production support.

Supports NXP i.MX processors by helping customers with product development, board bring-up, software development, debugging, evaluation, design-in, and production. Develops embedded firmware, demos, drivers, reference designs, application notes, and technical documentation. Collaborates with customers, partners, IC design, validation, architecture, marketing, and applications teams on processor enhancements and new SoC hardware designs.

Leads enterprise IT resilience, disaster recovery governance, business continuity alignment, Minimum Viable Company capabilities, cold-start recovery, crisis readiness, and recovery exercises. Establishes recovery standards, validates technology dependencies and objectives, coordinates cross-functional stakeholders, leads restoration during disruptive events, and reports readiness, risks, audit findings, and remediation progress to executive and audit stakeholders. Drives continuous improvement across global technology services.

Leads digital transformation projects implementing AI-powered search for NXP.com. Responsibilities include gathering requirements, developing project plans and workflows, evaluating search and AI/ML solutions, coordinating software delivery and testing, managing stakeholders and vendors, supporting deployment, and optimizing search content and performance through KPIs.

Conduct proactive threat hunting and exposure validation across enterprise environments. Investigate attack paths, misconfigurations, identity risks, cloud findings, endpoint activity, logs, and threat intelligence to identify exploitable security weaknesses. Assess attacker techniques and business impact, support detection engineering, collaborate on remediation, research emerging threats, and provide actionable recommendations to reduce attack surface and improve security posture.

Analyzes cyber threats, adversary activity, vulnerabilities, attack surfaces, and organizational exposures. Correlates threat intelligence with asset context and business criticality to prioritize remediation and reduce risk. Conducts investigations, infrastructure analysis, IOC management, and exposure assessments; develops intelligence products, metrics, and executive briefings; and partners with security, engineering, vulnerability management, incident response, cloud security, and risk teams.

Design and deliver digital IP for processors, controllers, serial links, and interconnects using Verilog and SystemVerilog RTL. Review architecture and microarchitecture specifications, plan development schedules, collaborate on verification to achieve full coverage, track quality metrics, and support SoC integration, validation, emulation, and customer issue resolution. Ensure designs meet performance, quality, safety, and schedule requirements while preventing defects from reaching silicon.