Top Tech Jobs & Startup Jobs

Lead process development for co-packaged optics and advanced semiconductor packaging across foundries and OSATs. Drive assembly chemistry and consumable development, mitigate technology and reliability risks, manage NPI through qualification and ramp to high-volume manufacturing, and coordinate cross-functional and vendor resources to meet program milestones and cost targets.

Seeking an experienced ASIC implementation and synthesis engineer to develop timing constraints, perform physical design tasks, and improve design flows using scripting and industry-standard tools.

The Sr. Staff Design Verification Engineer will develop verification plans, architect test benches, validate ASIC functionality, and debug issues in circuits.

The Technical Lead will oversee verification strategies for SoCs, develop UVM environments, and mentor junior engineers while ensuring functional correctness through collaboration with design and architecture teams.

Responsible for designing validation boards, analyzing user requirements, PCB layout, and supporting customer designs with technical reports and application notes.

The role involves developing timing constraints, performing static timing analysis, automating processes with scripting languages, and ensuring timing signoff compliance, while collaborating with cross-functional teams.

The role involves architecting and implementing high-speed analog and mixed-signal circuits for photonic transceivers and electronic ICs, requiring collaboration with multidisciplinary teams.

The Sr. Staff Thermo-Mechanical Engineer will focus on mechanical simulation and structural reliability of semiconductor test infrastructure, ensuring mechanical robustness and reliability of high-power semiconductor programs.

The Senior Staff Engineer will develop and validate timing constraints, lead static timing analysis, automate STA processes, and ensure compliance for ASIC designs while collaborating across various teams.

Seeking a Timing/STA Engineer with experience in ASIC design, timing constraints, and STA signoff flows. Responsibilities include static timing analysis, automation of processes, and collaboration across teams.