Top Tech Jobs & Startup Jobs

Lead physical implementation for complex SoC subsystems: develop methodologies, perform RTL-to-GDSII implementation (synthesis, floorplan, P&R, CTS, timing closure), harden subsystems, coordinate DFT/RTL/SOC teams, mentor engineers, evaluate EDA tools, and represent PD in strategic technical discussions.

Lead global travel and corporate card program operations, vendor relationships, policy, analytics, and T&E transformation. Drive platform selection, automation, compliance, employee experience, and close partnership with Accounting to ensure accurate reconciliations and audit readiness.

Lead high-speed IC package development focusing on signal and power integrity. Perform electrical design, 2D/3D EM modeling, measurements (VNA/TDR), manufacturability, supplier selection, and cross-functional coordination to deliver reliable, cost-effective packages for multi-hundred Gb/s data rates.

Develop and maintain UVM testbenches and verification collateral for complex SoC architectures. Create test plans and strategies, develop tests to meet coverage goals, debug failures, and collaborate with designers to resolve issues. Support verification environments and regression/bug-tracking workflows.

Design and implement synthesizable RTL (Verilog/SystemVerilog) for digital IP and subsystems. Perform linting, CDC and low-power checks, analyze timing/area/power tradeoffs, support synthesis and timing closure with physical design, debug via simulation/emulation/FPGA/silicon, participate in silicon validation, and mentor junior engineers.

Design and implement UVM testbench components and verification collateral; develop test plans, constrained-random tests, and coverage metrics; run simulations, debug failures with designers, and contribute automation and AI-enhanced verification tools while mentoring junior engineers.

Lead NPI and product engineering for silicon photonics optical modules and light engines. Develop end-to-end manufacturing and test solutions, define production flows and specs, manage BOM and pilot builds, drive yield improvement and reliability qualification, and sustain volume production with offshore manufacturers and CMs.

Design and maintain UVM-based SoC verification environments, create test plans, develop tests to meet coverage, debug failures, collaborate with designers, and mentor junior engineers.

Lead end-to-end IP program management for custom processors: source and license IP, coordinate internal/external stakeholders, ensure IP validation and qualification, drive issue resolution, manage roadmaps, costs, schedules, and continuous quality improvements across product lifecycle.

Lead hardware for ODSP chip programs from PRD through mass production. Own architecture-level technical decisions, coordinate cross-functional global teams, drive design, tape-out, bring-up, silicon validation and qualification, resolve post-silicon issues, and mentor hardware engineers while improving design methodology and delivery quality.